Difference between revisions of "RoboCup: Redesign 2014-2015"
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A few major change to the FPGA's [http://en.wikipedia.org/wiki/Verilog Verilog] code must be made for the 2015 redesign. This means documentation mean be produced/located for how the FPGA currently communicates on the SPI bus and append documentation for new protocol. | A few major change to the FPGA's [http://en.wikipedia.org/wiki/Verilog Verilog] code must be made for the 2015 redesign. This means documentation mean be produced/located for how the FPGA currently communicates on the SPI bus and append documentation for new protocol. | ||
| − | The Xilinx program for FPGA development | + | The Xilinx program for FPGA development is [http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.html ISE WebPACK] (this is on [http://www.ece-help.gatech.edu/labs/virtual.html ECE's virtual lab pool] computers - can connect to it from anywhere). |
{| class="wikitable" style="width: 500px;" | {| class="wikitable" style="width: 500px;" | ||
Revision as of 18:43, 17 December 2014
Contents
Phase I: Techanical Analysis
The first stage of the 2014-2015 RoboCup redesign involves brainstorming potential upgrades by researching new technologies/resources since the last revision. A parallel analysis of current robot bugs and potential enhancements is also done at this time. Outlined below is a listing of resources that the team used in this brainstorming stage.
Competition 2014 documentation
Team Description Papers (TDP)
Phase II: Design
During the design phase, specifications are determined for each section of the robot. Experimental results are documented here from all quantitative findings. This phase is also where the high-level ideas from Phase I are tracked to ensure completion.
Logical Controlling Unit
To Do
- Successfully communicate over SPI with a current FPGA and mbed
Completed
- Build development board for testing FPGA configuration from mbed's flash storage
- Obtain mbeds for robot use
- How: 15 mbeds donated by ECE department
Mechanical/Electrical Integration
To Do
- Determine location and placement for dribbler motor header
- Determine optimal placement direction for drive motor's phase connections (motor board)
- Add connection header for ball sensor to control board
- Add wires among connections in CAD assembly files
- Test motor wire modifications before working on the entire batch of motors
- Determine kicker connections and integration
- Determine options using quarter-turn screws for electrical board attachment
Completed
- Update hall connection header to right angled one
- Add pin locations to all connection housings in CAD part files
- Update the 14-pin connection header (female) for the control-to-motor board connection
- Finalize method for adjusting motor wire lengths when motors arrive
- Decision: Unsolder from motor's PCB, trim to length, and resolder to motor's PCB
- Reason: Did not want to delay ordering motors any futher & hand soldering results in higher yields compared against hand crimping
- Determine placement of battery location
Radio
Current protocol [LINK TO BE CREATED & UPDATED]
To Do
- Determine optimal secondary frequency for base station updates
- Test methods using breakout boards and compare data rates
- Successfully communicate using two (2) nRF24L01+ transceivers and two (2) mbeds
- Research and determine best steps for structuring radio protocol with primary and seconday frequencies
- The Crazyflie project has basic radio documentation for how they implemented real-time communication with room for expansion
- Test packet optimizations - Nanopb is promosing for this
Completed
- Research integration options of the CC1111 and nRF24LU1+
- Decision: Do not use SoC parts for the base station
- Reason: Keep radio software on the mbed platform's C++ libraries (SoC would require additional C code for the base station)
- Order five (5) CC1111 transceivers from TI
- Successfully communicate using two (2) CC1101 transceivers and two (2) mbeds
- Obtain breakout boards for CC1101
- How: Added SMA antenna connector to breakout boards from 2008 fleet
- Obtain breakout boards for nRF24L01+
- How: eBay
FPGA
A few major change to the FPGA's Verilog code must be made for the 2015 redesign. This means documentation mean be produced/located for how the FPGA currently communicates on the SPI bus and append documentation for new protocol.
The Xilinx program for FPGA development is ISE WebPACK (this is on ECE's virtual lab pool computers - can connect to it from anywhere).
| Command | Read/Write | Definition |
|---|---|---|
| 0x00 | Read Only | Receive Data Readings |
| 0x01 | Write | Set motor speeds |
| Array Index | Bit(s) | Definition |
|---|---|---|
| 0 | 7..0 | FPGA Version (0x04 in 2014) |
| 1 | 7..0 | Encoder 1 Count (LSB) |
| 2 | 7..0 |
Encoder 1 Count (MSB) |
| 3 | 7..0 |
Encoder 2 Count (LSB) |
| 4 | 7..0 |
Encoder 2 Count (MSB) |
| 5 | 7..0 |
Encoder 3 Count (LSB) |
| 6 | 7..0 |
Encoder 3 Count (MSB) |
| 7 | 7..0 |
Encoder 4 Count (LSB) |
| 8 | 7..0 |
Encoder 4 Count (MSB) |
| 9 | 7..0 |
Motor Fault |
| 10 | 7..0 |
Kicker Status |
| 11 | 7..0 |
Kicker Voltage |
| 12 | 7..0 |
Hall Count 1 |
| 13 | 7..0 |
Hall Count 2 |
| 14 | 7..0 |
Hall Count 3 |
| 15 | 7..0 | Hall Count 4 |
| 16 | 7..0 |
Hall Count 5 |
| Array Index | Bit(s) | Definition |
|---|---|---|
| 0 | 7..0 | Packet Type (0x01) |
| 1 | 7..0 | Motor 1 Speed (LSB) |
| 2 | 7..4 |
Reserved (Always 0) |
| 3..2 | Motor 1 Drive Mode | |
| 1..0 | Motor 1 Speed (MSB) | |
| 3 | 7..0 | Motor 2 Speed (LSB) |
| 4 | 7..4 | Reserved (Always 0) |
| 3..2 | Motor 2 Drive Mode | |
| 1..0 | Motor 2 Speed (MSB) | |
| 5 | 7..0 | Motor 3 Speed (LSB) |
| 6 | 7..4 | Reserved (Always 0) |
| 3..2 | Motor 3 Drive Mode | |
| 1..0 | Motor 3 Speed (MSB) | |
| 7 | 7..0 | Motor 4 Speed (LSB) |
| 8 | 7..4 | Reserved (Always 0) |
| 3..2 | Motor 4 Drive Mode | |
| 0..1 | Motor 4 Speed (MSB) | |
| 9 | 7..0 | Dribbler Motor Speed (LSB) |
| 10 | 7 | Kicker Charge |
| 6 | Chipper Enable (1=Chip, 0=Kick) | |
| 5..4 | Reserved (Always 0) | |
| 3..2 | Dribbler Motor Drive Mode | |
| 1..0 | Dribbler Motor Speed (MSB) | |
| 11 | 7..0 | style="text- |
To Do
- Transition the I2C bus lines to the microcontroller
- Update Verilog for new balanced encoder signals (A+, A-, B+, B-)
- ( (A+) + (A-) == 0 ) should be true for no errors
- Update Verilog for driving a bootstrap circuit
Completed
- Determine what communications occur over the SPI bus
- Documented in the tables above
- Finalized that the 2015 motors will use the current FPGA
- Decision: Xilinx Spartan-3E
- Reason: FPGA is only used for motor control & no futher capabilities are needed
Motors
Maxon 50W Custom Motor Drawing
To Do
- Order motor controller boards
- Test different circuits and document data result set to wiki
Completed
- Order 3 DRV8301 Pre-Drivers from TI
- Finalize the protyping designs of single motor controllers
- Order motors
Motion Sensing
To Do
Completed
- Order breakout board for MPU-9250
Error Detection & Indication
To Do
- Determine best solution for controlling the WS2812B RGB LED
Completed
- Create breakout board for MCP23017 and place on GitHub repository
Kicker Board
To Do
- Measure the current from kicker boards currently used
- Update the kicker board to accommodate the new battery's voltage of 18.5V
Completed
Battery & Power
The following contains a listing of batteries that were considered for the 2015 design along with other battery/power adapters and accessories.
To Do
- Determine power switch placement and integration
Completed
Battery
Zippy Flightmax 2200mAh 5S 40C
Connector
Charging Lead
Balancing Board
All Batteries
Zippy Flightmax 2500mAh 5S 20C
Zippy Flightmax 1800mAh 5S 40C
Phase III: Production
The final phase for creating the new fleet of robots involves outlining the steps and procedures for robot manufacturing and assebly. Future members can use this area as a reference for the fleet's required maintenance. It may also be benefitial for strengthening tolerances in future fleet builds.
Electronics Assembly
https://learn.sparkfun.com/tutorials/electronics-assembly
http://www.soldermask.com/ <- Sparfun uses these guys for all their solder stencils
