RoboJackets Wiki - User contributions [en]

People with Keys

2021-04-26T20:28:37Z

Jspall3:

'''These people have keys to the RoboJackets shop area. '''<br/>See [[Shop_Keys|Shop Keys]] for details on key assignments.

{| class="wikitable sortable"
|-
! Key Number
! Assigned To
|-
| 3SB6: 1
| ''Unassigned''
|-
| 3SB6: 4
| Cameron Loyd
|-
| 3SB6: 5
| Arvind Srinivasan
|-
| 3SB6: 7
| Christopher Bellflowers
|-
| 3SB6: 8
| Marine Maisonneuve
|-
| 3SB6: 9
| Vijay Srivastava
|-
| 3SB6: 12
| Ava Thrasher
|-
| 3SB6: 14
| Todd Hayes
|-
| 3SB6: 15
| Brian Epstein
|-
| 3SB6: 18
| Sam Morstein
|-
| 3SB6: 19
| Will Stuckey
|-
| 3SB6: 21
| Arthur Siqueira
|-
| 3SB6: 22
| Alex Field
|-
| 3SB6: 23
| Shishir Pandit-Rao
|-
| 3SB6: 24
| Kyle Stachowicz
|-
| 3SB6: 27
| Cade Tyler
|-
| 3SB6: 28
| Nathanael Koh
|-
| 3SB6: 29 - Lost
|
|-
|3SB6: 30
| Zach Slaton
|-
| 3SB6: 31
| Phillip Holloway
|-
|3SB6: 33
| Nikolay Tranakiev
|-
|3SB6: 34
| Tan Gemicioglu
|-
|3SB6: 35
| Dennis Crawford
|-
|3SB6: 36
| Varun Madabushi
|-
|3SB6: 39
| Alyssa Gordon
|-
|3SB6: 40
| Charles Li
|-
|3SB6: 41
| Andrew Rocco
|-
|3SB6: 43
| Michael Chen
|-
|3SB6: 44
| Caleb Chang
|-
|3SB6: 45
| Joe Spall
|}

[[Category:Core]]
[[Category: Shop]]

People with Keys

2020-09-12T18:10:33Z

Jspall3: Replaced key owner 28 from Joseph Spall to Tyler Bierfreund

'''These people have keys to the RoboJackets shop area. '''<br/>See [[Shop_Keys|Shop Keys]] for details on key assignments.

{| class="wikitable sortable"
|-
! Key Number
! Assigned To
|-
| 3SB6: 1
| ''Unassigned''
|-
| 3SB6: 4
| Cameron Loyd
|-
| 3SB6: 5
| Logan Schick
|-
| 3SB6: 7
| Christopher Bellflowers
|-
| 3SB6: 8
| Marine Maisonneuve
|-
| 3SB6: 9
| Vijay Srivastava
|-
| 3SB6: 12
| Ava Thrasher
|-
| 3SB6: 14
| Todd Hayes
|-
| 3SB6: 15
| Brian Epstein
|-
| 3SB6: 18
| Sam Morstein
|-
| 3SB6: 19
| Will Stuckey
|-
| 3SB6: 21
| Arthur Siqueira
|-
| 3SB6: 22
| Alex Field
|-
| 3SB6: 23
| Daniel Martin
|-
| 3SB6: 24
| Kyle Stachowicz
|-
| 3SB6: 27
| Cade Tyler
|-
| 3SB6: 28
| Tyler Bierfreund
|-
| 3SB6: 29 - Lost
|
|-
|3SB6: 30
| Cody Page
|-
| 3SB6: 31
| Phillip Holloway
|-
|3SB6: 33
| Malak Bayyari
|-
|3SB6: 34
| Tan Gemicioglu
|-
|3SB6: 35
| Dennis Crawford
|-
|3SB6: 36
| Varun Madabushi
|-
|3SB6: 39
| Alyssa Gordon
|-
|3SB6: 40
| Charles Li
|-
|3SB6: 41
| Andrew Rocco
|-
|3SB6: 43
| Young Won
|-
|3SB6: 44
| Caleb Chang
|-
|3SB6: 45
| Juan Elizondo
|}

[[Category:Core]]
[[Category: Shop]]

EAGLE Style Guide

2020-09-09T16:09:04Z

Jspall3: Shortened attribute names

=Part Creation=
==Symbol==
===Grid===
*'''Size:''' 0.1 in
*'''Alt:''' 0.01 in
===Name===
*Should be manufacturer part/family number (eg. ATTINY167-SU)
===Description===
*Leave blank
===Style===
*Origin
**Center origin (crosshair) on symbol center
*Text
**Keep text horizontal
**'''Size:''' 0.07 in
**'''Line Distance:''' 50%
**'''Font:''' proportional
*Name
**Locate in top left of symbol
**'''Align:''' bottom-left
**'''Layer:''' 95 Names
**'''Value:''' >NAME
*Value
**Locate in bottom-left of symbol
**'''Align:''' top-left
**'''Layer:''' 96 Values
**'''Value:''' >VALUE
*Outline
**Use Lines
***'''Width:''' 0.01 in
***'''Style:''' continuous
***'''Layer:''' 94 Symbol
***'''Curve:''' 0
**Try to have a length/width that is a 0.1 in multiple (eg. 0.4 in by 0.4 in)

===Functionality===
*Pins
**Label pins to allow the symbol to be applied to parts in similar families
**'''Name:''' Based on part datasheet
**'''Direction:''' pas (passive)
**'''Swap Level:''' 0
**'''Length:''' middle
**'''Function:''' none
**'''Visible:''' both
*Pin Placement
**Power (VCC): top left
**Ground (GND): bottom right
**Inputs: left edge
**Outputs: right edge
*Passive Pins
**Specifically resistors, capacitors, inductors, fuses, diodes
**'''Visible:''' off
*Connector Pins
**Try to reuse an existing symbol for the size of connector
**If need to make a new one, for pins:
***'''Visible:''' pad
*Decimal Labeling
**For fractional values include the decimal point (eg. 3.3V, 4.5K)
==Footprint==
===Grid===
*'''Size:''' 1 mm
*'''Alt:''' 0.1 mm
===Name===
*Should be manufacturer footprint name (eg. SOIC-20)
===Description===
*Link to datasheet for part/family for pad layout
===Style===
*Origin
**Center origin (crosshair) on footprint center
*Text
**Keep text horizontal
**'''Size:''' 1 mm
**'''Ratio:''' 10%
**'''Line Distance:''' 50%
**'''Font:''' vector
*Name
**Locate in top left of footprint
**'''Align:''' bottom-left
**'''Layer:''' 25 tNames
**'''Value:''' >NAME
*Value
**Locate in bottom-left of symbol
**'''Align:''' top-left
**'''Layer:''' 26 tValues
**'''Value:''' >VALUE
*Outline
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 21 tPlace
**Draw package outline per part/family datasheet
**Used for part placement
*Keepout
**Use Rectangles
***'''Layer:''' 39 tKeepout
**Size 0.1 mm larger than the package
**Used to prevent overlapping parts
*Details
**Capture more part details, extensions beyond outline, etc
**Use
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 51 tDocu

===Functionality===
*Pad (Through-hole)
**'''Name:''' name based on datasheet pin number
**'''Diameter:''' auto
**'''Drill:''' size based on datasheet
**'''Shape:''' circle
**'''Locked:''' unchecked
**'''Thermals:''' checked
**'''Stop:''' checked
**'''First:''' unchecked
*Smd (Surface Mount)
**'''Name:''' name based on datasheet pin number
**'''Smd Size:''' size based on datasheet
**'''Layer:''' 1 Top (usually)
**'''Roundness:''' 0%
**'''Locked:''' unchecked
**'''Thermals:''' checked
**'''Stop:''' checked
**'''Cream:''' checked
*Polarity Indication
**Through-hole
***Make pin 1 visually different
***'''Shape:''' square
**Indicate polarity, when necessary
***Prevents backwards installation
***Direction or cathode indicators for diodes
***Stripe or plus-minus for capacitors
**Indicate Pin 1 for ICs
***Use a circle (dot)
****'''Width:''' 0 mm
****'''Layer:''' 21 tPlace
****'''Radius:''' 0.2 mm (at minimum)
**Avoid overlapping pads with silkscreen, cut a section out
==Device==
===Name===
*Should be manufacturer part number (eg. ATTINY167-SU)
*Wildcards
**Allows devices with multiple technologies (specifications) or packages
***Uses wildcards in device name
***Technology Name: *
***Package Name: ?
**Example
***Regulator with two voltage (3.3V and 1.8V) technologies
****AP2138N-3.3TRG1 for 3.3V
****AP2138N-1.8TRG1 for 1.8V
****Becomes AP2138N-*TRG1 with technology 3.3 and 1.8
===Description===
*One sentence part function overview (valid for all variants)
*Datasheet link
===Value===
*Off unless its a passive part (resistors, capacitors, inductors, fuses, diodes)
*If its a specific passive part with a value, add an attribute
**'''Name:''' VALUE
**'''Value:''' the value
**'''Type:''' variable
===Symbol===
*Use specific symbol for that part/family
*Connectors are an exception
**Generic symbol used for all connectors of a certain size
===Footprint===
*Use specific footprint if unique
*Try to reuse a footprint if it matches
===Attribute (non-Passives)===
*Part number
**'''Name:''' DKPN
**'''Value:''' the Digi-Key Part Number (eg. ATTINY167-SU-ND)
**'''Type:''' variable
===Attribute (Passives)===
*Part number
**'''Name:''' DKPN
**'''Value:''' blank unless specific to part
**'''Type:''' variable
*Resistors
**Should have tolerance and power ratings that is blank by default
**Value is for resistance only
**Tolerance
***'''Name:''' TOL
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Power
***'''Name:''' POW
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Capacitors
**Should have tolerance and voltage ratings that is blank by default
**Value is for capacitance only
**Tolerance
***'''Name:''' TOL
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Voltage
***'''Name:''' VOLT
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Inductors
**Should have tolerance and current ratings that is blank by default
**Value is for inductance only
**Tolerance
***'''Name:''' TOL
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Current
***'''Name:''' CUR
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Fuses
**Value is for current rating
*Diodes
**LEDs
***Value should be color
**Normal Diode
***Value should be reverse voltage
**TVS Diode
***Value should be [Working Voltage]-[Breakdown Voltage] (e.g. 8V-8.5V)

===Prefix===
{| class="wikitable"
|+ Chart for Prefix Designators
|-
! Letter
! Part Type
|-
| A
| Separate Assembly or Subassembly
|-
| C
| Capacitor
|-
| D
| Diode or LED
|-
| F
| Fuse
|-
| FB
| Ferrite bead
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| POT
| Potentiometer
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| RN
| Resistor Network
|-
| S/SW
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|-
| XF
| External Fuse
|}

=Schematics=
==Grid==
*'''Size:''' 0.1 in
*'''Alt:''' 0.01 in
==Sheets==
===Overall===
*Group related subsystems into a sheet
*Have only 1 frame per sheet
===Frames===
*A 11 x 17" frame with the following attributes
**'''TEAM:''' RoboJackets team name
**'''SCH_DESC:''' Short summary of content in the frame
**'''REVISION:''' Schematic version
*Group related subsystems into boxes
**Use Lines
***'''Width:''' 0.006 in
***'''Style:''' shortdash
***'''Layer:''' 97 Info
***'''Curve:''' 0
**Label using Text
***'''Size:''' 0.07 in
***'''Ratio:''' 8%
***'''Line Distance:''' 50%
***'''Font:''' proportional
***'''Align:''' bottom-left
***'''Layer:''' 97 Info
===Description===
*Should match the SCH_DESC from the frame
==Nets==
===Style===
*Text
**'''Size:''' 0.05 in
**'''Ratio:''' 8%
**'''Line Distance:''' 50%
**'''Font:''' proportional
**'''Align:''' bottom-left
**'''Layer:''' 97 Info
===Signals===
*Should have a name if possible
*Label every net:
**'''Size:''' 0.05
**'''Ratio:''' 8%
**'''Font:''' proportional
**'''Align:''' bottom-left
**'''Layer:''' 95 Names
**'''Xref:''' checked
===Power===
*Use symbols with appropriate name as necessary
*Label with the voltage range and max current at driver
*Use Text
===Busses===
*Should have a name and description
*Use Text
==Notes==
===Computed Values===
*Note values derived from a datasheet with a short explanation
*Use Text within the box of the part in question
===Specific Parts===
*Note optional parts
*Note 0ohm isolation resistors and 0ohm jumper resistors
*Use Text within the box of the part in question
=Boards=
==Grid==
*'''Size:''' 1 mm
*'''Alt:''' 0.1 mm
==Board Fab==
*Load design rules before placement and routing
**Allows spacing constraints to be known to tool
*Check [https://github.com/RoboJackets/eagle-libraries/tree/master/design%20rules this repo] for common EAGLE DRC files per fab
==Placement==
===General===
*LEDs
**Locate power status LEDs near power sources
*Noise prevention
**Keep analog electronics far from high power electronics
**Provide adequate spacing for via stitching/shielding if needed
*Decoupling capacitors
**Recommended 1 per power pin on an IC
**Place as close as possible to the power pin
**Use multiple if necessary
***Reduces noise
***Place smallest value closest to the pin
===Mechanical Considerations===
*Plan for board mounting holes
**Figure out size of the hole and necessary clearance
**Prevent components and traces from being near bolt heads
*Plan for board cutouts and shape
**Mark these before placement and routing
***Use 51 tDoc / 52 bDoc to indicate cutout
**Prevent components and traces from being near the cutout
*Prevent components and traces from overlapping
**Use 39 tKeepout / 40 bKeepout to block components
**Use 41 tKeepout / 42 bKeepout to block copper and traces
==Routing==
===General Practices===
*For two layer boards, try to keep components, signals, and power on the top layer and a ground plane on the bottom layer
**Use Polygon
***'''Width:''' 0.2mm
***'''Cap:''' round
***'''Layer:''' 16 Bottom
***'''Curve:''' 0
***'''Polygon Pour:''' solid
***'''Spacing:''' 0.05
***'''Isolate:''' 0
***'''Rank:''' 1
***'''Orphans:''' unchecked
***'''Thermals:''' unchecked
*Use extra internal layers when necessary
**Allows for simplified power routing
**Leaves more space for signal traces
**Put power planes internally
***Layer 2 and 15 on 4 layer boards
***Layer 2, 3, 14, and 15 on 6 layer boards
*Route signals orthogonally to avoid cross-talk between different layers (for boards >2 layers)
*Differential signals
**Do not split differentially routed pairs unless impedance and arrival time can be matched
*High frequency
**High frequency signals should have continuous low impedance return path directly beneath trace.
**Keep high frequency signals isolated from other signals to minimize crosstalk
===Traces===
*In general
**'''Style:''' continuous
**'''Cap:''' round
**'''Curve:''' 0
*Signals
**'''Width:''' 0.3mm
*Power
**'''Width:''' 0.5mm (increase as necessary for [https://www.4pcb.com/trace-width-calculator.html current requirements])
*Avoid minimum sizing (based on the DRC) when possible
===Vias===
*At minimum
**'''Diameter:''' 0.65mm
**'''Drill:''' 0.35mm
**'''Shape:''' round
**'''Layer:''' 1-16
*Avoid minimum sizing (based on the DRC) when possible
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
==Silkscreen==
*Far more important than most people realize and can take a significant amount of time to get right
*Makes a board easier to use, easier to debug, and harder to break
===Style===
*Text
**'''Size:''' 1 mm (at minimum)
**'''Ratio:''' 8% (Important text can be bolded using 15%)
**'''Line Distance:''' 50%
**'''Font:''' vector
**'''Layer:''' 21 tPlace / 22 bPlace
*Markings (anything not already in footprints)
**Will be in final board output
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 21 tPlace / 22 bPlace
*Extra Details
**Will not be in final board output
**Capture more details, extensions beyond outline, etc
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 51 tDocu / 52 bDocu
*Measurements
**Will not be in final board output
**Useful to mark critical distances
**Can mark outer board dimensions
**Use Dimension
***'''Size:''' 2 mm
***'''Ratio:''' 8% (Important dimensions can be bolded using 15%)
***'''Layer:''' 47 Measures
***'''DType:''' parallel
***'''Line Width:''' 0.2mm
***'''Ext. Line Width:v auto
***'''Ext. Line Length:''' auto
***'''Ext. Line Offset:''' auto
***'''Unit:''' mm
***'''Precision:''' 3
***'''Show unit:''' checked
===Labels===
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values (e.g. on or off)
*Label all debug LEDs (e.g. MCU Status)
*Label all fuses with current rating
===General===
*Aesthetics
**Don’t place silkscreen on vias (even tented vias) unless absolutely unavoidable
**Have your team logo on the board (e.g. RoboBuzz)
*Versioning
**Have a "vMAJOR.minor" version text label on the board (e.g. v2.1)
**Have your team name and year on the board (e.g. RoboCup 2020)
*Board ID
**White square to allow for a board ID (e.g. written 2 means board 2)
**Recommended if more than three boards will be fabricated
**Use Rectangle
***Make width and height 5mm by 5mm (minimum)
***'''Layer:''' 21 tPlace / 22 bPlace

[[Category: Electrical]]

EAGLE Style Guide

2020-08-01T21:01:23Z

Jspall3: Potentiometer added to prefix

=Part Creation=
==Symbol==
===Grid===
*'''Size:''' 0.1 in
*'''Alt:''' 0.01 in
===Name===
*Should be manufacturer part/family number (eg. ATTINY167-SU)
===Description===
*Leave blank
===Style===
*Origin
**Center origin (crosshair) on symbol center
*Text
**Keep text horizontal
**'''Size:''' 0.07 in
**'''Line Distance:''' 50%
**'''Font:''' proportional
*Name
**Locate in top left of symbol
**'''Align:''' bottom-left
**'''Layer:''' 95 Names
**'''Value:''' >NAME
*Value
**Locate in bottom-left of symbol
**'''Align:''' top-left
**'''Layer:''' 96 Values
**'''Value:''' >VALUE
*Outline
**Use Lines
***'''Width:''' 0.01 in
***'''Style:''' continuous
***'''Layer:''' 94 Symbol
***'''Curve:''' 0
**Try to have a length/width that is a 0.1 in multiple (eg. 0.4 in by 0.4 in)

===Functionality===
*Pins
**Label pins to allow the symbol to be applied to parts in similar families
**'''Name:''' Based on part datasheet
**'''Direction:''' pas (passive)
**'''Swap Level:''' 0
**'''Length:''' middle
**'''Function:''' none
**'''Visible:''' both
*Pin Placement
**Power (VCC): top left
**Ground (GND): bottom right
**Inputs: left edge
**Outputs: right edge
*Passive Pins
**Specifically resistors, capacitors, inductors, fuses, diodes
**'''Visible:''' off
*Connector Pins
**Try to reuse an existing symbol for the size of connector
**If need to make a new one, for pins:
***'''Visible:''' pad
*Decimal Labeling
**For fractional values include the decimal point (eg. 3.3V, 4.5K)
==Footprint==
===Grid===
*'''Size:''' 1 mm
*'''Alt:''' 0.1 mm
===Name===
*Should be manufacturer footprint name (eg. SOIC-20)
===Description===
*Link to datasheet for part/family for pad layout
===Style===
*Origin
**Center origin (crosshair) on footprint center
*Text
**Keep text horizontal
**'''Size:''' 1 mm
**'''Ratio:''' 10%
**'''Line Distance:''' 50%
**'''Font:''' vector
*Name
**Locate in top left of footprint
**'''Align:''' bottom-left
**'''Layer:''' 25 tNames
**'''Value:''' >NAME
*Value
**Locate in bottom-left of symbol
**'''Align:''' top-left
**'''Layer:''' 26 tValues
**'''Value:''' >VALUE
*Outline
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 21 tPlace
**Draw package outline per part/family datasheet
**Used for part placement
*Keepout
**Use Rectangles
***'''Layer:''' 39 tKeepout
**Size 0.1 mm larger than the package
**Used to prevent overlapping parts
*Details
**Capture more part details, extensions beyond outline, etc
**Use
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 51 tDocu

===Functionality===
*Pad (Through-hole)
**'''Name:''' name based on datasheet pin number
**'''Diameter:''' auto
**'''Drill:''' size based on datasheet
**'''Shape:''' circle
**'''Locked:''' unchecked
**'''Thermals:''' checked
**'''Stop:''' checked
**'''First:''' unchecked
*Smd (Surface Mount)
**'''Name:''' name based on datasheet pin number
**'''Smd Size:''' size based on datasheet
**'''Layer:''' 1 Top (usually)
**'''Roundness:''' 0%
**'''Locked:''' unchecked
**'''Thermals:''' checked
**'''Stop:''' checked
**'''Cream:''' checked
*Polarity Indication
**Through-hole
***Make pin 1 visually different
***'''Shape:''' square
**Indicate polarity, when necessary
***Prevents backwards installation
***Direction or cathode indicators for diodes
***Stripe or plus-minus for capacitors
**Indicate Pin 1 for ICs
***Use a circle (dot)
****'''Width:''' 0 mm
****'''Layer:''' 21 tPlace
****'''Radius:''' 0.2 mm (at minimum)
**Avoid overlapping pads with silkscreen, cut a section out
==Device==
===Name===
*Should be manufacturer part number (eg. ATTINY167-SU)
*Wildcards
**Allows devices with multiple technologies (specifications) or packages
***Uses wildcards in device name
***Technology Name: *
***Package Name: ?
**Example
***Regulator with two voltage (3.3V and 1.8V) technologies
****AP2138N-3.3TRG1 for 3.3V
****AP2138N-1.8TRG1 for 1.8V
****Becomes AP2138N-*TRG1 with technology 3.3 and 1.8
===Description===
*One sentence part function overview (valid for all variants)
*Datasheet link
===Value===
*Off unless its a passive part (resistors, capacitors, inductors, fuses, diodes)
*If its a specific passive part with a value, add an attribute
**'''Name:''' VALUE
**'''Value:''' the value
**'''Type:''' variable
===Symbol===
*Use specific symbol for that part/family
*Connectors are an exception
**Generic symbol used for all connectors of a certain size
===Footprint===
*Use specific footprint if unique
*Try to reuse a footprint if it matches
===Attribute (non-Passives)===
*Part number
**'''Name:''' DKPN
**'''Value:''' the Digi-Key Part Number (eg. ATTINY167-SU-ND)
**'''Type:''' variable
===Attribute (Passives)===
*Part number
**'''Name:''' DKPN
**'''Value:''' blank unless specific to part
**'''Type:''' variable
*Resistors
**Should have tolerance and power ratings that is blank by default
**Value is for resistance only
**Tolerance
***'''Name:''' Tolerance
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Power
***'''Name:''' Power
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Capacitors
**Should have tolerance and voltage ratings that is blank by default
**Value is for capacitance only
**Tolerance
***'''Name:''' Tolerance
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Voltage
***'''Name:''' Voltage
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Inductors
**Should have tolerance and current ratings that is blank by default
**Value is for inductance only
**Tolerance
***'''Name:''' Tolerance
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Current
***'''Name:''' Current
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Fuses
**Value is for current rating
*Diodes
**LEDs
***Value should be color
**Normal Diode
***Value should be reverse voltage
**TVS Diode
***Value should be [Working Voltage]-[Breakdown Voltage] (e.g. 8V-8.5V)
===Prefix===
{| class="wikitable"
|+ Chart for Prefix Designators
|-
! Letter
! Part Type
|-
| A
| Separate Assembly or Subassembly
|-
| C
| Capacitor
|-
| D
| Diode or LED
|-
| F
| Fuse
|-
| FB
| Ferrite bead
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| POT
| Potentiometer
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| RN
| Resistor Network
|-
| S/SW
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|-
| XF
| External Fuse
|}

=Schematics=
==Grid==
*'''Size:''' 0.1 in
*'''Alt:''' 0.01 in
==Sheets==
===Overall===
*Group related subsystems into a sheet
*Have only 1 frame per sheet
===Frames===
*A 11 x 17" frame with the following attributes
**'''TEAM:''' RoboJackets team name
**'''SCH_DESC:''' Short summary of content in the frame
**'''REVISION:''' Schematic version
*Group related subsystems into boxes
**Use Lines
***'''Width:''' 0.006 in
***'''Style:''' shortdash
***'''Layer:''' 97 Info
***'''Curve:''' 0
**Label using Text
***'''Size:''' 0.07 in
***'''Ratio:''' 8%
***'''Line Distance:''' 50%
***'''Font:''' proportional
***'''Align:''' bottom-left
***'''Layer:''' 97 Info
===Description===
*Should match the SCH_DESC from the frame
==Nets==
===Style===
*Text
**'''Size:''' 0.05 in
**'''Ratio:''' 8%
**'''Line Distance:''' 50%
**'''Font:''' proportional
**'''Align:''' bottom-left
**'''Layer:''' 97 Info
===Signals===
*Should have a name if possible
*Label every net:
**'''Size:''' 0.05
**'''Ratio:''' 8%
**'''Font:''' proportional
**'''Align:''' bottom-left
**'''Layer:''' 95 Names
**'''Xref:''' checked
===Power===
*Use symbols with appropriate name as necessary
*Label with the voltage range and max current at driver
*Use Text
===Busses===
*Should have a name and description
*Use Text
==Notes==
===Computed Values===
*Note values derived from a datasheet with a short explanation
*Use Text within the box of the part in question
===Specific Parts===
*Note optional parts
*Note 0ohm isolation resistors and 0ohm jumper resistors
*Use Text within the box of the part in question
=Boards=
==Grid==
*'''Size:''' 1 mm
*'''Alt:''' 0.1 mm
==Board Fab==
*Load design rules before placement and routing
**Allows spacing constraints to be known to tool
*Check [https://github.com/RoboJackets/eagle-libraries/tree/master/design%20rules this repo] for common EAGLE DRC files per fab
==Placement==
===General===
*LEDs
**Locate power status LEDs near power sources
*Noise prevention
**Keep analog electronics far from high power electronics
**Provide adequate spacing for via stitching/shielding if needed
*Decoupling capacitors
**Recommended 1 per power pin on an IC
**Place as close as possible to the power pin
**Use multiple if necessary
***Reduces noise
***Place smallest value closest to the pin
===Mechanical Considerations===
*Plan for board mounting holes
**Figure out size of the hole and necessary clearance
**Prevent components and traces from being near bolt heads
*Plan for board cutouts and shape
**Mark these before placement and routing
***Use 51 tDoc / 52 bDoc to indicate cutout
**Prevent components and traces from being near the cutout
*Prevent components and traces from overlapping
**Use 39 tKeepout / 40 bKeepout to block components
**Use 41 tKeepout / 42 bKeepout to block copper and traces
==Routing==
===General Practices===
*For two layer boards, try to keep components, signals, and power on the top layer and a ground plane on the bottom layer
**Use Polygon
***'''Width:''' 0.2mm
***'''Cap:''' round
***'''Layer:''' 16 Bottom
***'''Curve:''' 0
***'''Polygon Pour:''' solid
***'''Spacing:''' 0.05
***'''Isolate:''' 0
***'''Rank:''' 1
***'''Orphans:''' unchecked
***'''Thermals:''' unchecked
*Use extra internal layers when necessary
**Allows for simplified power routing
**Leaves more space for signal traces
**Put power planes internally
***Layer 2 and 15 on 4 layer boards
***Layer 2, 3, 14, and 15 on 6 layer boards
*Route signals orthogonally to avoid cross-talk between different layers (for boards >2 layers)
*Differential signals
**Do not split differentially routed pairs unless impedance and arrival time can be matched
*High frequency
**High frequency signals should have continuous low impedance return path directly beneath trace.
**Keep high frequency signals isolated from other signals to minimize crosstalk
===Traces===
*In general
**'''Style:''' continuous
**'''Cap:''' round
**'''Curve:''' 0
*Signals
**'''Width:''' 0.3mm
*Power
**'''Width:''' 0.5mm (increase as necessary for [https://www.4pcb.com/trace-width-calculator.html current requirements])
*Avoid minimum sizing (based on the DRC) when possible
===Vias===
*At minimum
**'''Diameter:''' 0.65mm
**'''Drill:''' 0.35mm
**'''Shape:''' round
**'''Layer:''' 1-16
*Avoid minimum sizing (based on the DRC) when possible
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
==Silkscreen==
*Far more important than most people realize and can take a significant amount of time to get right
*Makes a board easier to use, easier to debug, and harder to break
===Style===
*Text
**'''Size:''' 1 mm (at minimum)
**'''Ratio:''' 8% (Important text can be bolded using 15%)
**'''Line Distance:''' 50%
**'''Font:''' vector
**'''Layer:''' 21 tPlace / 22 bPlace
*Markings (anything not already in footprints)
**Will be in final board output
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 21 tPlace / 22 bPlace
*Extra Details
**Will not be in final board output
**Capture more details, extensions beyond outline, etc
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 51 tDocu / 52 bDocu
*Measurements
**Will not be in final board output
**Useful to mark critical distances
**Can mark outer board dimensions
**Use Dimension
***'''Size:''' 2 mm
***'''Ratio:''' 8% (Important dimensions can be bolded using 15%)
***'''Layer:''' 47 Measures
***'''DType:''' parallel
***'''Line Width:''' 0.2mm
***'''Ext. Line Width:v auto
***'''Ext. Line Length:''' auto
***'''Ext. Line Offset:''' auto
***'''Unit:''' mm
***'''Precision:''' 3
***'''Show unit:''' checked
===Labels===
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values (e.g. on or off)
*Label all debug LEDs (e.g. MCU Status)
*Label all fuses with current rating
===General===
*Aesthetics
**Don’t place silkscreen on vias (even tented vias) unless absolutely unavoidable
**Have your team logo on the board (e.g. RoboBuzz)
*Versioning
**Have a "vMAJOR.minor" version text label on the board (e.g. v2.1)
**Have your team name and year on the board (e.g. RoboCup 2020)
*Board ID
**White square to allow for a board ID (e.g. written 2 means board 2)
**Recommended if more than three boards will be fabricated
**Use Rectangle
***Make width and height 5mm by 5mm (minimum)
***'''Layer:''' 21 tPlace / 22 bPlace

[[Category: Electrical]]

EAGLE Style Guide

2020-07-12T15:09:19Z

Jspall3: /* Style */

=Part Creation=
==Symbol==
===Grid===
*'''Size:''' 0.1 in
*'''Alt:''' 0.01 in
===Name===
*Should be manufacturer part/family number (eg. ATTINY167-SU)
===Description===
*Leave blank
===Style===
*Origin
**Center origin (crosshair) on symbol center
*Text
**Keep text horizontal
**'''Size:''' 0.07 in
**'''Line Distance:''' 50%
**'''Font:''' proportional
*Name
**Locate in top left of symbol
**'''Align:''' bottom-left
**'''Layer:''' 95 Names
**'''Value:''' >NAME
*Value
**Locate in bottom-left of symbol
**'''Align:''' top-left
**'''Layer:''' 96 Values
**'''Value:''' >VALUE
*Outline
**Use Lines
***'''Width:''' 0.01 in
***'''Style:''' continuous
***'''Layer:''' 94 Symbol
***'''Curve:''' 0
**Try to have a length/width that is a 0.1 in multiple (eg. 0.4 in by 0.4 in)

===Functionality===
*Pins
**Label pins to allow the symbol to be applied to parts in similar families
**'''Name:''' Based on part datasheet
**'''Direction:''' pas (passive)
**'''Swap Level:''' 0
**'''Length:''' middle
**'''Function:''' none
**'''Visible:''' both
*Pin Placement
**Power (VCC): top left
**Ground (GND): bottom right
**Inputs: left edge
**Outputs: right edge
*Passive Pins
**Specifically resistors, capacitors, inductors, fuses, diodes
**'''Visible:''' off
*Connector Pins
**Try to reuse an existing symbol for the size of connector
**If need to make a new one, for pins:
***'''Visible:''' pad
*Decimal Labeling
**For fractional values include the decimal point (eg. 3.3V, 4.5K)
==Footprint==
===Grid===
*'''Size:''' 1 mm
*'''Alt:''' 0.1 mm
===Name===
*Should be manufacturer footprint name (eg. SOIC-20)
===Description===
*Link to datasheet for part/family for pad layout
===Style===
*Origin
**Center origin (crosshair) on footprint center
*Text
**Keep text horizontal
**'''Size:''' 1 mm
**'''Ratio:''' 10%
**'''Line Distance:''' 50%
**'''Font:''' vector
*Name
**Locate in top left of footprint
**'''Align:''' bottom-left
**'''Layer:''' 25 tNames
**'''Value:''' >NAME
*Value
**Locate in bottom-left of symbol
**'''Align:''' top-left
**'''Layer:''' 26 tValues
**'''Value:''' >VALUE
*Outline
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 21 tPlace
**Draw package outline per part/family datasheet
**Used for part placement
*Keepout
**Use Rectangles
***'''Layer:''' 39 tKeepout
**Size 0.1 mm larger than the package
**Used to prevent overlapping parts
*Details
**Capture more part details, extensions beyond outline, etc
**Use
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 51 tDocu

===Functionality===
*Pad (Through-hole)
**'''Name:''' name based on datasheet pin number
**'''Diameter:''' auto
**'''Drill:''' size based on datasheet
**'''Shape:''' circle
**'''Locked:''' unchecked
**'''Thermals:''' checked
**'''Stop:''' checked
**'''First:''' unchecked
*Smd (Surface Mount)
**'''Name:''' name based on datasheet pin number
**'''Smd Size:''' size based on datasheet
**'''Layer:''' 1 Top (usually)
**'''Roundness:''' 0%
**'''Locked:''' unchecked
**'''Thermals:''' checked
**'''Stop:''' checked
**'''Cream:''' checked
*Polarity Indication
**Through-hole
***Make pin 1 visually different
***'''Shape:''' square
**Indicate polarity, when necessary
***Prevents backwards installation
***Direction or cathode indicators for diodes
***Stripe or plus-minus for capacitors
**Indicate Pin 1 for ICs
***Use a circle (dot)
****'''Width:''' 0 mm
****'''Layer:''' 21 tPlace
****'''Radius:''' 0.2 mm (at minimum)
**Avoid overlapping pads with silkscreen, cut a section out
==Device==
===Name===
*Should be manufacturer part number (eg. ATTINY167-SU)
*Wildcards
**Allows devices with multiple technologies (specifications) or packages
***Uses wildcards in device name
***Technology Name: *
***Package Name: ?
**Example
***Regulator with two voltage (3.3V and 1.8V) technologies
****AP2138N-3.3TRG1 for 3.3V
****AP2138N-1.8TRG1 for 1.8V
****Becomes AP2138N-*TRG1 with technology 3.3 and 1.8
===Description===
*One sentence part function overview (valid for all variants)
*Datasheet link
===Value===
*Off unless its a passive part (resistors, capacitors, inductors, fuses, diodes)
*If its a specific passive part with a value, add an attribute
**'''Name:''' VALUE
**'''Value:''' the value
**'''Type:''' variable
===Symbol===
*Use specific symbol for that part/family
*Connectors are an exception
**Generic symbol used for all connectors of a certain size
===Footprint===
*Use specific footprint if unique
*Try to reuse a footprint if it matches
===Attribute (non-Passives)===
*Part number
**'''Name:''' DKPN
**'''Value:''' the Digi-Key Part Number (eg. ATTINY167-SU-ND)
**'''Type:''' variable
===Attribute (Passives)===
*Part number
**'''Name:''' DKPN
**'''Value:''' blank unless specific to part
**'''Type:''' variable
*Resistors
**Should have tolerance and power ratings that is blank by default
**Value is for resistance only
**Tolerance
***'''Name:''' Tolerance
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Power
***'''Name:''' Power
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Capacitors
**Should have tolerance and voltage ratings that is blank by default
**Value is for capacitance only
**Tolerance
***'''Name:''' Tolerance
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Voltage
***'''Name:''' Voltage
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Inductors
**Should have tolerance and current ratings that is blank by default
**Value is for inductance only
**Tolerance
***'''Name:''' Tolerance
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Current
***'''Name:''' Current
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Fuses
**Value is for current rating
*Diodes
**LEDs
***Value should be color
**Normal Diode
***Value should be reverse voltage
**TVS Diode
***Value should be [Working Voltage]-[Breakdown Voltage] (e.g. 8V-8.5V)
===Prefix===
{| class="wikitable"
|+ Chart for Prefix Designators
|-
! Letter
! Part Type
|-
| A
| Separate Assembly or Subassembly
|-
| C
| Capacitor
|-
| D
| Diode or LED
|-
| F
| Fuse
|-
| FB
| Ferrite bead
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| RN
| Resistor Network
|-
| S/SW
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|-
| XF
| External Fuse
|}
=Schematics=
==Grid==
*'''Size:''' 0.1 in
*'''Alt:''' 0.01 in
==Sheets==
===Overall===
*Group related subsystems into a sheet
*Have only 1 frame per sheet
===Frames===
*A 11 x 17" frame with the following attributes
**'''TEAM:''' RoboJackets team name
**'''SCH_DESC:''' Short summary of content in the frame
**'''REVISION:''' Schematic version
*Group related subsystems into boxes
**Use Lines
***'''Width:''' 0.006 in
***'''Style:''' shortdash
***'''Layer:''' 97 Info
***'''Curve:''' 0
**Label using Text
***'''Size:''' 0.07 in
***'''Ratio:''' 8%
***'''Line Distance:''' 50%
***'''Font:''' proportional
***'''Align:''' bottom-left
***'''Layer:''' 97 Info
===Description===
*Should match the SCH_DESC from the frame
==Nets==
===Style===
*Text
**'''Size:''' 0.05 in
**'''Ratio:''' 8%
**'''Line Distance:''' 50%
**'''Font:''' proportional
**'''Align:''' bottom-left
**'''Layer:''' 97 Info
===Signals===
*Should have a name if possible
*Label every net:
**'''Size:''' 0.05
**'''Ratio:''' 8%
**'''Font:''' proportional
**'''Align:''' bottom-left
**'''Layer:''' 95 Names
**'''Xref:''' checked
===Power===
*Use symbols with appropriate name as necessary
*Label with the voltage range and max current at driver
*Use Text
===Busses===
*Should have a name and description
*Use Text
==Notes==
===Computed Values===
*Note values derived from a datasheet with a short explanation
*Use Text within the box of the part in question
===Specific Parts===
*Note optional parts
*Note 0ohm isolation resistors and 0ohm jumper resistors
*Use Text within the box of the part in question
=Boards=
==Grid==
*'''Size:''' 1 mm
*'''Alt:''' 0.1 mm
==Board Fab==
*Load design rules before placement and routing
**Allows spacing constraints to be known to tool
*Check [https://github.com/RoboJackets/eagle-libraries/tree/master/design%20rules this repo] for common EAGLE DRC files per fab
==Placement==
===General===
*LEDs
**Locate power status LEDs near power sources
*Noise prevention
**Keep analog electronics far from high power electronics
**Provide adequate spacing for via stitching/shielding if needed
*Decoupling capacitors
**Recommended 1 per power pin on an IC
**Place as close as possible to the power pin
**Use multiple if necessary
***Reduces noise
***Place smallest value closest to the pin
===Mechanical Considerations===
*Plan for board mounting holes
**Figure out size of the hole and necessary clearance
**Prevent components and traces from being near bolt heads
*Plan for board cutouts and shape
**Mark these before placement and routing
***Use 51 tDoc / 52 bDoc to indicate cutout
**Prevent components and traces from being near the cutout
*Prevent components and traces from overlapping
**Use 39 tKeepout / 40 bKeepout to block components
**Use 41 tKeepout / 42 bKeepout to block copper and traces
==Routing==
===General Practices===
*For two layer boards, try to keep components, signals, and power on the top layer and a ground plane on the bottom layer
**Use Polygon
***'''Width:''' 0.2mm
***'''Cap:''' round
***'''Layer:''' 16 Bottom
***'''Curve:''' 0
***'''Polygon Pour:''' solid
***'''Spacing:''' 0.05
***'''Isolate:''' 0
***'''Rank:''' 1
***'''Orphans:''' unchecked
***'''Thermals:''' unchecked
*Use extra internal layers when necessary
**Allows for simplified power routing
**Leaves more space for signal traces
**Put power planes internally
***Layer 2 and 15 on 4 layer boards
***Layer 2, 3, 14, and 15 on 6 layer boards
*Route signals orthogonally to avoid cross-talk between different layers (for boards >2 layers)
*Differential signals
**Do not split differentially routed pairs unless impedance and arrival time can be matched
*High frequency
**High frequency signals should have continuous low impedance return path directly beneath trace.
**Keep high frequency signals isolated from other signals to minimize crosstalk
===Traces===
*In general
**'''Style:''' continuous
**'''Cap:''' round
**'''Curve:''' 0
*Signals
**'''Width:''' 0.3mm
*Power
**'''Width:''' 0.5mm (increase as necessary for [https://www.4pcb.com/trace-width-calculator.html current requirements])
*Avoid minimum sizing (based on the DRC) when possible
===Vias===
*At minimum
**'''Diameter:''' 0.65mm
**'''Drill:''' 0.35mm
**'''Shape:''' round
**'''Layer:''' 1-16
*Avoid minimum sizing (based on the DRC) when possible
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
==Silkscreen==
*Far more important than most people realize and can take a significant amount of time to get right
*Makes a board easier to use, easier to debug, and harder to break
===Style===
*Text
**'''Size:''' 1 mm (at minimum)
**'''Ratio:''' 8% (Important text can be bolded using 15%)
**'''Line Distance:''' 50%
**'''Font:''' vector
**'''Layer:''' 21 tPlace / 22 bPlace
*Markings (anything not already in footprints)
**Will be in final board output
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 21 tPlace / 22 bPlace
*Extra Details
**Will not be in final board output
**Capture more details, extensions beyond outline, etc
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 51 tDocu / 52 bDocu
*Measurements
**Will not be in final board output
**Useful to mark critical distances
**Can mark outer board dimensions
**Use Dimension
***'''Size:''' 2 mm
***'''Ratio:''' 8% (Important dimensions can be bolded using 15%)
***'''Layer:''' 47 Measures
***'''DType:''' parallel
***'''Line Width:''' 0.2mm
***'''Ext. Line Width:v auto
***'''Ext. Line Length:''' auto
***'''Ext. Line Offset:''' auto
***'''Unit:''' mm
***'''Precision:''' 3
***'''Show unit:''' checked
===Labels===
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values (e.g. on or off)
*Label all debug LEDs (e.g. MCU Status)
*Label all fuses with current rating
===General===
*Aesthetics
**Don’t place silkscreen on vias (even tented vias) unless absolutely unavoidable
**Have your team logo on the board (e.g. RoboBuzz)
*Versioning
**Have a "vMAJOR.minor" version text label on the board (e.g. v2.1)
**Have your team name and year on the board (e.g. RoboCup 2020)
*Board ID
**White square to allow for a board ID (e.g. written 2 means board 2)
**Recommended if more than three boards will be fabricated
**Use Rectangle
***Make width and height 5mm by 5mm (minimum)
***'''Layer:''' 21 tPlace / 22 bPlace

[[Category: Electrical]]

EAGLE Style Guide

2020-07-12T15:08:17Z

Jspall3: /* Style */

=Part Creation=
==Symbol==
===Grid===
*'''Size:''' 0.1 in
*'''Alt:''' 0.01 in
===Name===
*Should be manufacturer part/family number (eg. ATTINY167-SU)
===Description===
*Leave blank
===Style===
*Origin
**Center origin (crosshair) on symbol center
*Text
**Keep text horizontal
**'''Size:''' 0.07 in
**'''Ratio:''' 8%
**'''Line Distance:''' 50%
**'''Font:''' proportional
*Name
**Locate in top left of symbol
**'''Align:''' bottom-left
**'''Layer:''' 95 Names
**'''Value:''' >NAME
*Value
**Locate in bottom-left of symbol
**'''Align:''' top-left
**'''Layer:''' 96 Values
**'''Value:''' >VALUE
*Outline
**Use Lines
***'''Width:''' 0.01 in
***'''Style:''' continuous
***'''Layer:''' 94 Symbol
***'''Curve:''' 0
**Try to have a length/width that is a 0.1 in multiple (eg. 0.4 in by 0.4 in)
===Functionality===
*Pins
**Label pins to allow the symbol to be applied to parts in similar families
**'''Name:''' Based on part datasheet
**'''Direction:''' pas (passive)
**'''Swap Level:''' 0
**'''Length:''' middle
**'''Function:''' none
**'''Visible:''' both
*Pin Placement
**Power (VCC): top left
**Ground (GND): bottom right
**Inputs: left edge
**Outputs: right edge
*Passive Pins
**Specifically resistors, capacitors, inductors, fuses, diodes
**'''Visible:''' off
*Connector Pins
**Try to reuse an existing symbol for the size of connector
**If need to make a new one, for pins:
***'''Visible:''' pad
*Decimal Labeling
**For fractional values include the decimal point (eg. 3.3V, 4.5K)
==Footprint==
===Grid===
*'''Size:''' 1 mm
*'''Alt:''' 0.1 mm
===Name===
*Should be manufacturer footprint name (eg. SOIC-20)
===Description===
*Link to datasheet for part/family for pad layout
===Style===
*Origin
**Center origin (crosshair) on footprint center
*Text
**Keep text horizontal
**'''Size:''' 1 mm
**'''Ratio:''' 10%
**'''Line Distance:''' 50%
**'''Font:''' vector
*Name
**Locate in top left of footprint
**'''Align:''' bottom-left
**'''Layer:''' 25 tNames
**'''Value:''' >NAME
*Value
**Locate in bottom-left of symbol
**'''Align:''' top-left
**'''Layer:''' 26 tValues
**'''Value:''' >VALUE
*Outline
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 21 tPlace
**Draw package outline per part/family datasheet
**Used for part placement
*Keepout
**Use Rectangles
***'''Layer:''' 39 tKeepout
**Size 0.1 mm larger than the package
**Used to prevent overlapping parts
*Details
**Capture more part details, extensions beyond outline, etc
**Use
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 51 tDocu

===Functionality===
*Pad (Through-hole)
**'''Name:''' name based on datasheet pin number
**'''Diameter:''' auto
**'''Drill:''' size based on datasheet
**'''Shape:''' circle
**'''Locked:''' unchecked
**'''Thermals:''' checked
**'''Stop:''' checked
**'''First:''' unchecked
*Smd (Surface Mount)
**'''Name:''' name based on datasheet pin number
**'''Smd Size:''' size based on datasheet
**'''Layer:''' 1 Top (usually)
**'''Roundness:''' 0%
**'''Locked:''' unchecked
**'''Thermals:''' checked
**'''Stop:''' checked
**'''Cream:''' checked
*Polarity Indication
**Through-hole
***Make pin 1 visually different
***'''Shape:''' square
**Indicate polarity, when necessary
***Prevents backwards installation
***Direction or cathode indicators for diodes
***Stripe or plus-minus for capacitors
**Indicate Pin 1 for ICs
***Use a circle (dot)
****'''Width:''' 0 mm
****'''Layer:''' 21 tPlace
****'''Radius:''' 0.2 mm (at minimum)
**Avoid overlapping pads with silkscreen, cut a section out
==Device==
===Name===
*Should be manufacturer part number (eg. ATTINY167-SU)
*Wildcards
**Allows devices with multiple technologies (specifications) or packages
***Uses wildcards in device name
***Technology Name: *
***Package Name: ?
**Example
***Regulator with two voltage (3.3V and 1.8V) technologies
****AP2138N-3.3TRG1 for 3.3V
****AP2138N-1.8TRG1 for 1.8V
****Becomes AP2138N-*TRG1 with technology 3.3 and 1.8
===Description===
*One sentence part function overview (valid for all variants)
*Datasheet link
===Value===
*Off unless its a passive part (resistors, capacitors, inductors, fuses, diodes)
*If its a specific passive part with a value, add an attribute
**'''Name:''' VALUE
**'''Value:''' the value
**'''Type:''' variable
===Symbol===
*Use specific symbol for that part/family
*Connectors are an exception
**Generic symbol used for all connectors of a certain size
===Footprint===
*Use specific footprint if unique
*Try to reuse a footprint if it matches
===Attribute (non-Passives)===
*Part number
**'''Name:''' DKPN
**'''Value:''' the Digi-Key Part Number (eg. ATTINY167-SU-ND)
**'''Type:''' variable
===Attribute (Passives)===
*Part number
**'''Name:''' DKPN
**'''Value:''' blank unless specific to part
**'''Type:''' variable
*Resistors
**Should have tolerance and power ratings that is blank by default
**Value is for resistance only
**Tolerance
***'''Name:''' Tolerance
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Power
***'''Name:''' Power
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Capacitors
**Should have tolerance and voltage ratings that is blank by default
**Value is for capacitance only
**Tolerance
***'''Name:''' Tolerance
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Voltage
***'''Name:''' Voltage
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Inductors
**Should have tolerance and current ratings that is blank by default
**Value is for inductance only
**Tolerance
***'''Name:''' Tolerance
***'''Value:''' blank unless specific to part
***'''Type:''' variable
**Current
***'''Name:''' Current
***'''Value:''' blank unless specific to part
***'''Type:''' variable
*Fuses
**Value is for current rating
*Diodes
**LEDs
***Value should be color
**Normal Diode
***Value should be reverse voltage
**TVS Diode
***Value should be [Working Voltage]-[Breakdown Voltage] (e.g. 8V-8.5V)
===Prefix===
{| class="wikitable"
|+ Chart for Prefix Designators
|-
! Letter
! Part Type
|-
| A
| Separate Assembly or Subassembly
|-
| C
| Capacitor
|-
| D
| Diode or LED
|-
| F
| Fuse
|-
| FB
| Ferrite bead
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| RN
| Resistor Network
|-
| S/SW
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|-
| XF
| External Fuse
|}
=Schematics=
==Grid==
*'''Size:''' 0.1 in
*'''Alt:''' 0.01 in
==Sheets==
===Overall===
*Group related subsystems into a sheet
*Have only 1 frame per sheet
===Frames===
*A 11 x 17" frame with the following attributes
**'''TEAM:''' RoboJackets team name
**'''SCH_DESC:''' Short summary of content in the frame
**'''REVISION:''' Schematic version
*Group related subsystems into boxes
**Use Lines
***'''Width:''' 0.006 in
***'''Style:''' shortdash
***'''Layer:''' 97 Info
***'''Curve:''' 0
**Label using Text
***'''Size:''' 0.07 in
***'''Ratio:''' 8%
***'''Line Distance:''' 50%
***'''Font:''' proportional
***'''Align:''' bottom-left
***'''Layer:''' 97 Info
===Description===
*Should match the SCH_DESC from the frame
==Nets==
===Style===
*Text
**'''Size:''' 0.05 in
**'''Ratio:''' 8%
**'''Line Distance:''' 50%
**'''Font:''' proportional
**'''Align:''' bottom-left
**'''Layer:''' 97 Info
===Signals===
*Should have a name if possible
*Label every net:
**'''Size:''' 0.05
**'''Ratio:''' 8%
**'''Font:''' proportional
**'''Align:''' bottom-left
**'''Layer:''' 95 Names
**'''Xref:''' checked
===Power===
*Use symbols with appropriate name as necessary
*Label with the voltage range and max current at driver
*Use Text
===Busses===
*Should have a name and description
*Use Text
==Notes==
===Computed Values===
*Note values derived from a datasheet with a short explanation
*Use Text within the box of the part in question
===Specific Parts===
*Note optional parts
*Note 0ohm isolation resistors and 0ohm jumper resistors
*Use Text within the box of the part in question
=Boards=
==Grid==
*'''Size:''' 1 mm
*'''Alt:''' 0.1 mm
==Board Fab==
*Load design rules before placement and routing
**Allows spacing constraints to be known to tool
*Check [https://github.com/RoboJackets/eagle-libraries/tree/master/design%20rules this repo] for common EAGLE DRC files per fab
==Placement==
===General===
*LEDs
**Locate power status LEDs near power sources
*Noise prevention
**Keep analog electronics far from high power electronics
**Provide adequate spacing for via stitching/shielding if needed
*Decoupling capacitors
**Recommended 1 per power pin on an IC
**Place as close as possible to the power pin
**Use multiple if necessary
***Reduces noise
***Place smallest value closest to the pin
===Mechanical Considerations===
*Plan for board mounting holes
**Figure out size of the hole and necessary clearance
**Prevent components and traces from being near bolt heads
*Plan for board cutouts and shape
**Mark these before placement and routing
***Use 51 tDoc / 52 bDoc to indicate cutout
**Prevent components and traces from being near the cutout
*Prevent components and traces from overlapping
**Use 39 tKeepout / 40 bKeepout to block components
**Use 41 tKeepout / 42 bKeepout to block copper and traces
==Routing==
===General Practices===
*For two layer boards, try to keep components, signals, and power on the top layer and a ground plane on the bottom layer
**Use Polygon
***'''Width:''' 0.2mm
***'''Cap:''' round
***'''Layer:''' 16 Bottom
***'''Curve:''' 0
***'''Polygon Pour:''' solid
***'''Spacing:''' 0.05
***'''Isolate:''' 0
***'''Rank:''' 1
***'''Orphans:''' unchecked
***'''Thermals:''' unchecked
*Use extra internal layers when necessary
**Allows for simplified power routing
**Leaves more space for signal traces
**Put power planes internally
***Layer 2 and 15 on 4 layer boards
***Layer 2, 3, 14, and 15 on 6 layer boards
*Route signals orthogonally to avoid cross-talk between different layers (for boards >2 layers)
*Differential signals
**Do not split differentially routed pairs unless impedance and arrival time can be matched
*High frequency
**High frequency signals should have continuous low impedance return path directly beneath trace.
**Keep high frequency signals isolated from other signals to minimize crosstalk
===Traces===
*In general
**'''Style:''' continuous
**'''Cap:''' round
**'''Curve:''' 0
*Signals
**'''Width:''' 0.3mm
*Power
**'''Width:''' 0.5mm (increase as necessary for [https://www.4pcb.com/trace-width-calculator.html current requirements])
*Avoid minimum sizing (based on the DRC) when possible
===Vias===
*At minimum
**'''Diameter:''' 0.65mm
**'''Drill:''' 0.35mm
**'''Shape:''' round
**'''Layer:''' 1-16
*Avoid minimum sizing (based on the DRC) when possible
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
==Silkscreen==
*Far more important than most people realize and can take a significant amount of time to get right
*Makes a board easier to use, easier to debug, and harder to break
===Style===
*Text
**'''Size:''' 1 mm (at minimum)
**'''Ratio:''' 8% (Important text can be bolded using 15%)
**'''Line Distance:''' 50%
**'''Font:''' vector
**'''Layer:''' 21 tPlace / 22 bPlace
*Markings (anything not already in footprints)
**Will be in final board output
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 21 tPlace / 22 bPlace
*Extra Details
**Will not be in final board output
**Capture more details, extensions beyond outline, etc
**Use Lines
***'''Width:''' 0.2 mm
***'''Style:''' continuous
***'''Layer:''' 51 tDocu / 52 bDocu
*Measurements
**Will not be in final board output
**Useful to mark critical distances
**Can mark outer board dimensions
**Use Dimension
***'''Size:''' 2 mm
***'''Ratio:''' 8% (Important dimensions can be bolded using 15%)
***'''Layer:''' 47 Measures
***'''DType:''' parallel
***'''Line Width:''' 0.2mm
***'''Ext. Line Width:v auto
***'''Ext. Line Length:''' auto
***'''Ext. Line Offset:''' auto
***'''Unit:''' mm
***'''Precision:''' 3
***'''Show unit:''' checked
===Labels===
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values (e.g. on or off)
*Label all debug LEDs (e.g. MCU Status)
*Label all fuses with current rating
===General===
*Aesthetics
**Don’t place silkscreen on vias (even tented vias) unless absolutely unavoidable
**Have your team logo on the board (e.g. RoboBuzz)
*Versioning
**Have a "vMAJOR.minor" version text label on the board (e.g. v2.1)
**Have your team name and year on the board (e.g. RoboCup 2020)
*Board ID
**White square to allow for a board ID (e.g. written 2 means board 2)
**Recommended if more than three boards will be fabricated
**Use Rectangle
***Make width and height 5mm by 5mm (minimum)
***'''Layer:''' 21 tPlace / 22 bPlace

[[Category: Electrical]]

EAGLE Style Guide

2020-05-24T15:33:00Z

Jspall3: Added ferrite bead

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left

===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left
*Outline of package on tDocu/bDocu
*Outline safe distance outside of package with tKeepout/bKeepout (width 0.1 mm) to prevent components from being placed on top of each other

===Font===
*Font - Vector
*Ratio - 10%
**unless made bold for end user benefit
*Size - 1 mm

===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough

==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part
*Datasheet link (if available)

===Prefix===
{| class="wikitable"
|+ Chart for Designation
|-
! Letter
! Part Type
|-
| A
| Separable assembly or sub-assembly (e.g. printed circuit assembly)
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| FB
| Ferrite bead
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| RN
| Resistor Network
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-27T02:10:37Z

Jspall3: Added A to prefix list

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left

===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left
*Outline of package on tDocu/bDocu
*Outline safe distance outside of package with tKeepout/bKeepout (width 0.1 mm) to prevent components from being placed on top of each other

===Font===
*Font - Vector
*Ratio - 10%
**unless made bold for end user benefit
*Size - 1 mm

===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough

==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part
*Datasheet link (if available)

===Prefix===
{| class="wikitable"
|+ Chart for Designation
|-
! Letter
! Part Type
|-
| A
| Separable assembly or sub-assembly (e.g. printed circuit assembly)
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| RN
| Resistor Network
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-22T18:58:51Z

Jspall3: Increased font ratio to 10%

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left

===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left
*Outline of package on tDocu/bDocu
*Outline safe distance outside of package with tKeepout/bKeepout (width 0.1 mm) to prevent components from being placed on top of each other

===Font===
*Font - Vector
*Ratio - 10%
**unless made bold for end user benefit
*Size - 1 mm

===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough

==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part
*Datasheet link (if available)

===Prefix===
{| class="wikitable"
|+ Chart for Designation
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| RN
| Resistor Network
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-22T18:01:44Z

Jspall3: Added resistor network

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left

===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left
*Outline of package on tDocu/bDocu
*Outline safe distance outside of package with tKeepout/bKeepout (width 0.1 mm) to prevent components from being placed on top of each other

===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough

==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part
*Datasheet link (if available)

===Prefix===
{| class="wikitable"
|+ Chart for Designation
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| RN
| Resistor Network
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-22T17:59:05Z

Jspall3: Cleaned up writing

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left

===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left
*Outline of package on tDocu/bDocu
*Outline safe distance outside of package with tKeepout/bKeepout (width 0.1 mm) to prevent components from being placed on top of each other

===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough

==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part
*Datasheet link (if available)

===Prefix===
{| class="wikitable"
|+ Chart for Designation
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-22T17:50:36Z

Jspall3: Added keepout

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left

===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left
*Outline of package on tDocu/bDocu
*Outline safe distance outside of package with tKeepout/bKeepout (width 0.1 mm) to prevent components from being placed on top of each other

===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough

==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
{| class="wikitable"
|+ Chart for Designation
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-22T17:45:54Z

Jspall3: Reformat label for table

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left

===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left
*Outline of package on tDocu/bDocu
===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough

==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
{| class="wikitable"
|+ Chart for Designation
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-22T17:42:52Z

Jspall3: Updated style to match symbol

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left

===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left
*Outline of package on tDocu/bDocu
===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough

==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
*Chart for Designators
{| class="wikitable"
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-22T17:42:03Z

Jspall3: Consistent style with footprint

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Center origin of grid on the center of the part
*>VALUE tag aligned bottom-left
*>NAME tag aligned top-left

===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough
===Labeling===
*>NAME label on top
*>VALUE label on below
*Outline of package on tDocu/bDocu
==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
*Chart for Designators
{| class="wikitable"
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-22T17:41:02Z

Jspall3: Updated Style

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Center origin of grid on the center of the part
*Value tag aligned bottom-left
*Name tag aligned top-left

===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough
===Labeling===
*>NAME label on top
*>VALUE label on below
*Outline of package on tDocu/bDocu
==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
*Chart for Designators
{| class="wikitable"
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-22T17:40:32Z

Jspall3: /* Symbol */

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Location
**Center origin of grid on the center of the part
**Value tag aligned bottom-left
**Name tag aligned top-left
===Font===
*Font - Proportional
*Size - 0.07 in
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.

==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough
===Labeling===
*>NAME label on top
*>VALUE label on below
*Outline of package on tDocu/bDocu
==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
*Chart for Designators
{| class="wikitable"
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-22T17:39:13Z

Jspall3: Change font header style to match footprint

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Location
**Center origin of grid on the center of the part
===Font===
*Font - Proportional
*Size - 0.07 in
*Value aligned bottom-left, name on top left of symbol

===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.
==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough
===Labeling===
*>NAME label on top
*>VALUE label on below
*Outline of package on tDocu/bDocu
==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
*Chart for Designators
{| class="wikitable"
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-04-21T23:33:50Z

Jspall3: Change to proportional font for Schematics

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Location
**Center origin of grid on the center of the part
*Font
**Proportional rendered
**Size of 0.07 in
**Value aligned bottom-left, name on top left of symbol

===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.
==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough
===Labeling===
*>NAME label on top
*>VALUE label on below
*Outline of package on tDocu/bDocu
==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
*Chart for Designators
{| class="wikitable"
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-03-19T19:14:33Z

Jspall3: Prefix table added

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Location
**Center origin of grid on the center of the part
*Font
**Vector rendered
**Ratio 8%, unless made bold for end user benefit
**Size of 0.07 in
**Value aligned bottom-left, name on top left of symbol
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.
==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough
===Labeling===
*>NAME label on top
*>VALUE label on below
*Outline of package on tDocu/bDocu
==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
*Chart for Designators
{| class="wikitable"
|-
! Letter
! Part Type
|-
| C
| Capacitor
|-
| D
| Diode, LED
|-
| F
| Fuse
|-
| J
| Jack or Connector (least moveable connection part)
|-
| JP
| Jumper
|-
| K
| Relay or Contactor
|-
| L
| Inductor
|-
| LS/BZ
| Loudspeaker or Buzzer
|-
| M
| Motor
|-
| P
| Plug (most moveable connection part)
|-
| PS
| Power Supply
|-
| Q
| Transistor
|-
| R
| Resistor
|-
| S
| Switch
|-
| T
| Transformer
|-
| TP
| Test Point
|-
| U
| Integrated Circuit
|-
| X
| Crystal
|}

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-03-19T19:04:30Z

Jspall3: Final style changes

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Location
**Center origin of grid on the center of the part
*Font
**Vector rendered
**Ratio 8%, unless made bold for end user benefit
**Size of 0.07 in
**Value aligned bottom-left, name on top left of symbol
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.
==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough
===Labeling===
*>NAME label on top
*>VALUE label on below
*Outline of package on tDocu/bDocu
==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
*Chart for Designators

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
*Every net should have a name if possible
**Use xref tags at 0.05 size
*Every bus should have a name and description
*Every power net should be labeled with the acceptable voltage range and max current at the net driver
*Differentially routed nets should be commented as such as the driver and sink
*Impedance controlled nets should be commented as such as the driver and sink
*Power and Ground nets
**Use symbol with appropriate name
==Configs==
*Any value computed (e.g. varies by application) from a datasheet should be noted
*Any optional parts should be noted
*0ohm isolation resistor and 0ohm jumper resistors should be noted
=Boards=
==Fab House / Validation==
*Load fab house DRC before place and route
*RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
==Placement==
*Keep analog electronics far from high power electronics
*Locate power net status LEDs near power sources
*Provide adequate spacing for stitching/shielding if needed
*Verify any mechanical considerations
**Board mounting holes
**Component mounting holes/cutouts
**Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
*Place decoupling capacitors as close to the power pin of the IC as possible
**Smallest values should be closest to pin to minimize parasitic inductance
==Routing==
*Avoid minimum trace width where possible
**Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
*Avoid minimum trace spacing where possible
*Avoid minimum drill/via size where possible
**Suggestions: 0.35mm drill, 0.65mm diameter for vias
*Do not split differentially routed pairs unless impedance and arrival time can be matched
*Avoid vias on signals above 1GHz
*Use the same number of vias on differentially routed traces
*For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
*High frequency signals should have continuous low impedance return path directly beneath trace.
*Keep high frequency signals isolated from other signals to minimize crosstalk
*Route signals orthogonally to avoid cross-talk
==Silkscreen==
*This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
===Meta===
*Have at least a "vMAJOR.minor" version label on the board
*Have your team name and year (optionally month, Ubuntu style) on the board
*Have your team logo on the board
*Have a filled white square to write in an instance ID
**Recommended if more than three boards will be fabricated
**e.g. can say "board #2 is broken", there is a "2" written on the white square
**Cover ink with Kapton tape
*Don’t place them on vias (even tented vias) unless absolutely unavoidable
===Components & Connectors===
*Set default line width to 0.2mm
*Label all power inputs with name and voltage (current optional)
*Label all connectors with name
*Label all switches with position values
*Label all debug LEDs
*Label all fuses with current rating (type optional)
===Font===
*All font should be vector rendered
*All font should be ratio 8%, unless made bold for end user benefit
*Component font size should be "1"
**e.g. R45, Q1, etc.
*Layer - t/bPlace

EAGLE Style Guide

2020-03-18T02:05:54Z

Jspall3: Continued formatting

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Location
**Center origin of grid on the center of the part
*Font
**Vector rendered
**Ratio 8%, unless made bold for end user benefit
**Size of 0.07 in
**Value aligned bottom-left, name on top left of symbol
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.
==Footprint==
===Grid===
*1 mm Size
*0.1 mm Alt
===Font===
*Font - Vector
*Ratio - 8%
**unless made bold for end user benefit
*Size - 1 mm
===Functionality===
*Silkscreen
**Line for alignment on tPlace/bPlace
**All ICs should have pin one marked with a dot
**All diodes should have direction or cathode marks
**Clearly indicate polarity as necessary
**Try not to overlap pads with silkscreen; although tedious, cut a section out
*Slots
**Use the milling layer (46) to draw the outline of the slot
**Create the pad using the elongated pad
**Set the hole diameter to the width of the slot
**Export the milling layer to its own gerber file and attach it with the rest of your gerbers
**Every manufacturer has its own preferred method, but seems to be accepted widely enough
===Labeling===
*>NAME label on top
*>VALUE label on below
*Outline of package on tDocu/bDocu
==Device==
===Attributes===
*Name should be manufacturer part number
*Attribute - DKPN should be filled with the Digi-Key part number
===Descriptions===
*One sentence describes the function of the part*
*Datasheet link if available*
===Prefix===
*Chart for Designators

=Schematics=
==Overall==
*Organize subsystems as follows:
*Related subsystems should be grouped into a sheet
*Each subsystem in a sheet should be boxed clearly, and that box labeled
**Use line tool, width 0.006, shortdash, layer 97 info
**Label font
***Font - vector
***Ratio - 12%
***Size - 0.25 in
***Layer - Info
**Every sheet should have the following:
***A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
***A name
***Last edit date
***Last edit engineer(s)
***Schematic version
***Page #
**Frames within a schematic should all be the same size
==Nets==
**Every net should have a name if possible
Use xref tags at 0.05 size
Every bus should have a name and description
Every power net should be labeled with the acceptable voltage range and max current at the net driver
Differentially routed nets should be commented as such as the driver and sink
Impedance controlled nets should be commented as such as the driver and sink
Power and Ground nets
Use symbol with appropriate name
Configs
Any value computed (e.g. varies by application) from a datasheet should be noted
Any optional parts should be noted
0ohm isolation resistor and 0ohm jumper resistors should be noted
Boards
Fab House / Validation
Load fab house DRC before place and route
RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
Placement
Keep analog electronics far from high power electronics
Locate power net status LEDs near power sources
Provide adequate spacing for stitching/shielding if needed
Verify any mechanical considerations
Board mounting holes
Component mounting holes/cutouts
Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
Place decoupling capacitors as close to the power pin of the IC as possible
Smallest values should be closest to pin to minimize parasitic inductance
Routing
Avoid minimum trace width where possible
Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
Avoid minimum trace spacing where possible
Avoid minimum drill/via size where possible
Suggestions: 0.35mm drill, 0.65mm diameter for vias
Do not split differentially routed pairs unless impedance and arrival time can be matched
Avoid vias on signals above 1GHz
Use the same number of vias on differentially routed traces
For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
High frequency signals should have continuous low impedance return path directly beneath trace.
Keep high frequency signals isolated from other signals to minimize crosstalk
route signals orthogonally to avoid cross-talk
Silkscreen
This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
Meta
Have at least a "vMAJOR.minor" version label on the board
Have your team name and year (optionally month, Ubuntu style) on the board
Have your team logo on the board
Have a filled white square to write in an instance ID
Recommended if more than three boards will be fabricated
e.g. can say "board #2 is broken", there is a "2" written on the white square
Cover ink with Kapton tape
Don’t place them on vias (even tented vias) unless absolutely unavoidable
Components & Connectors
Set default line width to 0.2mm
Label all power inputs with name and voltage (current optional)
Label all connectors with name
Label all switches with position values
Label all debug LEDs
Label all fuses with current rating (type optional)
Font
All font should be vector rendered
All font should be ratio 8%, unless made bold for end user benefit
Component font size should be "1"
e.g. R45, Q1, etc.
Layer - t/bPlace

EAGLE Style Guide

2020-03-18T00:52:24Z

Jspall3: Formatting

=Part Creation=
==Symbol==
===Grid===
*0.1 inches Size
*0.01 inches Alt
===Style===
*Location
**Center origin of grid on the center of the part
*Font
**Vector rendered
**Ratio 8%, unless made bold for end user benefit
**Size of 0.07 in
**Value aligned bottom-left, name on top left of symbol
===Functionality===
*Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
*For passive elements, pin labels can be disabled for simplicity
**“Visible - pin” for just the pin label
**“Visible - pad” for just the pad label
*Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
*For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
*Pin placement
**Inputs on left
**Outputs on right
**Power on top (optional)
**Ground on bottom (optional)
*Decimal value labeling
**For labeling fractional values, include the decimal point. Eg. 3.3V
**4.51k → 4,510 kOhm
**NOT 3V3, etc.
==Footprint==
Grid
1 mm Size
0.1 mm Alt
Font
Font - Vector
Ratio - 8%
unless made bold for end user benefit
Size - 1 mm
Functionality
Silkscreen
Line for alignment on tPlace/bPlace
All ICs should have pin one marked with a dot
All diodes should have direction or cathode marks
Clearly indicate polarity as necessary
Try not to overlap pads with silkscreen; although tedious, cut a section out
Slots
Use the milling layer (46) to draw the outline of the slot
Create the pad using the elongated pad
Set the hole diameter to the width of the slot
Export the milling layer to its own gerber file and attach it with the rest of your gerbers
Every manufacturer has its own preferred method, but seems to be accepted widely enough
Labeling
>NAME label on top
>VALUE label on below
Outline of package on tDocu/bDocu
Device
Attributes
Name should be manufacturer part number
Attribute - DKPN should be filled with the Digi-Key part number
Descriptions
One sentence describes the function of the part
Datasheet link if available
Prefix
Chart for Designators
Letter
Part Type
C
Capacitor
D
Diode, LED
F
Fuse
J
Jack or Connector (least moveable connection part)
JP
Jumper
K
Relay or Contactor
L
Inductor
LS/BZ
Loudspeaker or buzzer
M
Motor
P
Plug (most moveable connection part)
PS
Power Supply
Q
Transistor (all)
R
Resistor
S/SW
Switch
T
Transformer
TP
Test Point
U
Integrated Circuit
X
Crystal

Schematics
Overall
Organize subsystems as follows:
Related subsystems should be grouped into a sheet
Each subsystem in a sheet should be boxed clearly, and that box labeled
Use line tool, width 0.006, shortdash, layer 97 info
Label font
Font - vector
Ratio - 12%
Size - 0.25 in
Layer - Info
Every sheet should have the following:
A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
A name
Last edit date
Last edit engineer(s)
Schematic version
Page #
Frames within a schematic should all be the same size
Nets
Every net should have a name if possible
Use xref tags at 0.05 size
Every bus should have a name and description
Every power net should be labeled with the acceptable voltage range and max current at the net driver
Differentially routed nets should be commented as such as the driver and sink
Impedance controlled nets should be commented as such as the driver and sink
Power and Ground nets
Use symbol with appropriate name
Configs
Any value computed (e.g. varies by application) from a datasheet should be noted
Any optional parts should be noted
0ohm isolation resistor and 0ohm jumper resistors should be noted
Boards
Fab House / Validation
Load fab house DRC before place and route
RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
Placement
Keep analog electronics far from high power electronics
Locate power net status LEDs near power sources
Provide adequate spacing for stitching/shielding if needed
Verify any mechanical considerations
Board mounting holes
Component mounting holes/cutouts
Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
Place decoupling capacitors as close to the power pin of the IC as possible
Smallest values should be closest to pin to minimize parasitic inductance
Routing
Avoid minimum trace width where possible
Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
Avoid minimum trace spacing where possible
Avoid minimum drill/via size where possible
Suggestions: 0.35mm drill, 0.65mm diameter for vias
Do not split differentially routed pairs unless impedance and arrival time can be matched
Avoid vias on signals above 1GHz
Use the same number of vias on differentially routed traces
For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
High frequency signals should have continuous low impedance return path directly beneath trace.
Keep high frequency signals isolated from other signals to minimize crosstalk
route signals orthogonally to avoid cross-talk
Silkscreen
This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
Meta
Have at least a "vMAJOR.minor" version label on the board
Have your team name and year (optionally month, Ubuntu style) on the board
Have your team logo on the board
Have a filled white square to write in an instance ID
Recommended if more than three boards will be fabricated
e.g. can say "board #2 is broken", there is a "2" written on the white square
Cover ink with Kapton tape
Don’t place them on vias (even tented vias) unless absolutely unavoidable
Components & Connectors
Set default line width to 0.2mm
Label all power inputs with name and voltage (current optional)
Label all connectors with name
Label all switches with position values
Label all debug LEDs
Label all fuses with current rating (type optional)
Font
All font should be vector rendered
All font should be ratio 8%, unless made bold for end user benefit
Component font size should be "1"
e.g. R45, Q1, etc.
Layer - t/bPlace

EAGLE Style Guide

2020-03-17T23:21:01Z

Jspall3:

=Part Creation=
== Symbol ==
Grid
0.1 inches Size
0.01 inches Alt
Style
Location
Center origin of grid on the center of the part
Font
Vector rendered
Ratio 8%, unless made bold for end user benefit
Size of 0.07 in
Value aligned bottom-left, name on top left of symbol
Functionality
Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
For passive elements, pin labels can be disabled for simplicity
“Visible - pin” for just the pin label
“Visible - pad” for just the pad label
Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
Pin placement
Inputs on left
Outputs on right
Power on top (optional)
Ground on bottom (optional)
Decimal value labeling
For labeling fractional values, include the decimal point. Eg. 3.3V
4.51k → 4,510 kOhm
NOT 3V3, etc.
Footprint
Grid
1 mm Size
0.1 mm Alt
Font
Font - Vector
Ratio - 8%
unless made bold for end user benefit
Size - 1 mm
Functionality
Silkscreen
Line for alignment on tPlace/bPlace
All ICs should have pin one marked with a dot
All diodes should have direction or cathode marks
Clearly indicate polarity as necessary
Try not to overlap pads with silkscreen; although tedious, cut a section out
Slots
Use the milling layer (46) to draw the outline of the slot
Create the pad using the elongated pad
Set the hole diameter to the width of the slot
Export the milling layer to its own gerber file and attach it with the rest of your gerbers
Every manufacturer has its own preferred method, but seems to be accepted widely enough
Labeling
>NAME label on top
>VALUE label on below
Outline of package on tDocu/bDocu
Device
Attributes
Name should be manufacturer part number
Attribute - DKPN should be filled with the Digi-Key part number
Descriptions
One sentence describes the function of the part
Datasheet link if available
Prefix
Chart for Designators
Letter
Part Type
C
Capacitor
D
Diode, LED
F
Fuse
J
Jack or Connector (least moveable connection part)
JP
Jumper
K
Relay or Contactor
L
Inductor
LS/BZ
Loudspeaker or buzzer
M
Motor
P
Plug (most moveable connection part)
PS
Power Supply
Q
Transistor (all)
R
Resistor
S/SW
Switch
T
Transformer
TP
Test Point
U
Integrated Circuit
X
Crystal

Schematics
Overall
Organize subsystems as follows:
Related subsystems should be grouped into a sheet
Each subsystem in a sheet should be boxed clearly, and that box labeled
Use line tool, width 0.006, shortdash, layer 97 info
Label font
Font - vector
Ratio - 12%
Size - 0.25 in
Layer - Info
Every sheet should have the following:
A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
A name
Last edit date
Last edit engineer(s)
Schematic version
Page #
Frames within a schematic should all be the same size
Nets
Every net should have a name if possible
Use xref tags at 0.05 size
Every bus should have a name and description
Every power net should be labeled with the acceptable voltage range and max current at the net driver
Differentially routed nets should be commented as such as the driver and sink
Impedance controlled nets should be commented as such as the driver and sink
Power and Ground nets
Use symbol with appropriate name
Configs
Any value computed (e.g. varies by application) from a datasheet should be noted
Any optional parts should be noted
0ohm isolation resistor and 0ohm jumper resistors should be noted
Boards
Fab House / Validation
Load fab house DRC before place and route
RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
Placement
Keep analog electronics far from high power electronics
Locate power net status LEDs near power sources
Provide adequate spacing for stitching/shielding if needed
Verify any mechanical considerations
Board mounting holes
Component mounting holes/cutouts
Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
Place decoupling capacitors as close to the power pin of the IC as possible
Smallest values should be closest to pin to minimize parasitic inductance
Routing
Avoid minimum trace width where possible
Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
Avoid minimum trace spacing where possible
Avoid minimum drill/via size where possible
Suggestions: 0.35mm drill, 0.65mm diameter for vias
Do not split differentially routed pairs unless impedance and arrival time can be matched
Avoid vias on signals above 1GHz
Use the same number of vias on differentially routed traces
For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
High frequency signals should have continuous low impedance return path directly beneath trace.
Keep high frequency signals isolated from other signals to minimize crosstalk
route signals orthogonally to avoid cross-talk
Silkscreen
This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
Meta
Have at least a "vMAJOR.minor" version label on the board
Have your team name and year (optionally month, Ubuntu style) on the board
Have your team logo on the board
Have a filled white square to write in an instance ID
Recommended if more than three boards will be fabricated
e.g. can say "board #2 is broken", there is a "2" written on the white square
Cover ink with Kapton tape
Don’t place them on vias (even tented vias) unless absolutely unavoidable
Components & Connectors
Set default line width to 0.2mm
Label all power inputs with name and voltage (current optional)
Label all connectors with name
Label all switches with position values
Label all debug LEDs
Label all fuses with current rating (type optional)
Font
All font should be vector rendered
All font should be ratio 8%, unless made bold for end user benefit
Component font size should be "1"
e.g. R45, Q1, etc.
Layer - t/bPlace

EAGLE Style Guide

2020-03-17T23:20:00Z

Jspall3: Initial Eagle guide

Symbol
Grid
0.1 inches Size
0.01 inches Alt
Style
Location
Center origin of grid on the center of the part
Font
Vector rendered
Ratio 8%, unless made bold for end user benefit
Size of 0.07 in
Value aligned bottom-left, name on top left of symbol
Functionality
Pins should be labeled in a way that allows the symbol to be applied to any parts in a similar family
For passive elements, pin labels can be disabled for simplicity
“Visible - pin” for just the pin label
“Visible - pad” for just the pad label
Use passive for the pin type; at a minimum, don’t set any to power even if they are power pins
For functional layout: Inputs on left, outputs on right, power top-left, ground bottom-right.
Pin placement
Inputs on left
Outputs on right
Power on top (optional)
Ground on bottom (optional)
Decimal value labeling
For labeling fractional values, include the decimal point. Eg. 3.3V
4.51k → 4,510 kOhm
NOT 3V3, etc.
Footprint
Grid
1 mm Size
0.1 mm Alt
Font
Font - Vector
Ratio - 8%
unless made bold for end user benefit
Size - 1 mm
Functionality
Silkscreen
Line for alignment on tPlace/bPlace
All ICs should have pin one marked with a dot
All diodes should have direction or cathode marks
Clearly indicate polarity as necessary
Try not to overlap pads with silkscreen; although tedious, cut a section out
Slots
Use the milling layer (46) to draw the outline of the slot
Create the pad using the elongated pad
Set the hole diameter to the width of the slot
Export the milling layer to its own gerber file and attach it with the rest of your gerbers
Every manufacturer has its own preferred method, but seems to be accepted widely enough
Labeling
>NAME label on top
>VALUE label on below
Outline of package on tDocu/bDocu
Device
Attributes
Name should be manufacturer part number
Attribute - DKPN should be filled with the Digi-Key part number
Descriptions
One sentence describes the function of the part
Datasheet link if available
Prefix
Chart for Designators
Letter
Part Type
C
Capacitor
D
Diode, LED
F
Fuse
J
Jack or Connector (least moveable connection part)
JP
Jumper
K
Relay or Contactor
L
Inductor
LS/BZ
Loudspeaker or buzzer
M
Motor
P
Plug (most moveable connection part)
PS
Power Supply
Q
Transistor (all)
R
Resistor
S/SW
Switch
T
Transformer
TP
Test Point
U
Integrated Circuit
X
Crystal

Schematics
Overall
Organize subsystems as follows:
Related subsystems should be grouped into a sheet
Each subsystem in a sheet should be boxed clearly, and that box labeled
Use line tool, width 0.006, shortdash, layer 97 info
Label font
Font - vector
Ratio - 12%
Size - 0.25 in
Layer - Info
Every sheet should have the following:
A frame no bigger than 11 x 17" (8½ x 11” preferred), which should have the following info:
A name
Last edit date
Last edit engineer(s)
Schematic version
Page #
Frames within a schematic should all be the same size
Nets
Every net should have a name if possible
Use xref tags at 0.05 size
Every bus should have a name and description
Every power net should be labeled with the acceptable voltage range and max current at the net driver
Differentially routed nets should be commented as such as the driver and sink
Impedance controlled nets should be commented as such as the driver and sink
Power and Ground nets
Use symbol with appropriate name
Configs
Any value computed (e.g. varies by application) from a datasheet should be noted
Any optional parts should be noted
0ohm isolation resistor and 0ohm jumper resistors should be noted
Boards
Fab House / Validation
Load fab house DRC before place and route
RoboJackets has slightly conservative DRCs for 2 and 4 layer boards
Placement
Keep analog electronics far from high power electronics
Locate power net status LEDs near power sources
Provide adequate spacing for stitching/shielding if needed
Verify any mechanical considerations
Board mounting holes
Component mounting holes/cutouts
Use tDoc/bDoc and/or tKeepout/bKeepout for bolt head size to prevent traces near mounting
Place decoupling capacitors as close to the power pin of the IC as possible
Smallest values should be closest to pin to minimize parasitic inductance
Routing
Avoid minimum trace width where possible
Suggestions: 0.2 to 0.3mm for signals, 0.4 to 0.5mm for power (increase as needed for current rating)
Avoid minimum trace spacing where possible
Avoid minimum drill/via size where possible
Suggestions: 0.35mm drill, 0.65mm diameter for vias
Do not split differentially routed pairs unless impedance and arrival time can be matched
Avoid vias on signals above 1GHz
Use the same number of vias on differentially routed traces
For two layer boards, try to keep component, signal, and power on the top layer and ground return on the bottom layer
High frequency signals should have continuous low impedance return path directly beneath trace.
Keep high frequency signals isolated from other signals to minimize crosstalk
route signals orthogonally to avoid cross-talk
Silkscreen
This is far more important than most people realize and can take a significant amount of time to get right. A good silkscreen makes a board easier to use, easier to debug, and harder to break.
Meta
Have at least a "vMAJOR.minor" version label on the board
Have your team name and year (optionally month, Ubuntu style) on the board
Have your team logo on the board
Have a filled white square to write in an instance ID
Recommended if more than three boards will be fabricated
e.g. can say "board #2 is broken", there is a "2" written on the white square
Cover ink with Kapton tape
Don’t place them on vias (even tented vias) unless absolutely unavoidable
Components & Connectors
Set default line width to 0.2mm
Label all power inputs with name and voltage (current optional)
Label all connectors with name
Label all switches with position values
Label all debug LEDs
Label all fuses with current rating (type optional)
Font
All font should be vector rendered
All font should be ratio 8%, unless made bold for end user benefit
Component font size should be "1"
e.g. R45, Q1, etc.
Layer - t/bPlace

Requesting Access to Buildings

2020-02-03T23:42:24Z

Jspall3: /* Department of Mechanical Engineering */

It may be necessary for officers to request access to various buildings on campus to fulfill their responsibilities or to request access to certain buildings for RoboJackets members. This page is provide guidance on how this is accomplished for different buildings/departments.

== Department of Mechanical Engineering ==

Shop Keys
*Shop keys should be signed out by a member who has not been issued one
*Shop keys may need to be cut, so don't expect one immediately
*Shop keys are tracked here: [[PeopleWithKeys]]

Buzzcard Access (including for Shop)
*Email facilities@me.gatech.edu .csv files with names and GTIDs, being specific on which doors we're requesting access to
*CC Facility Advisor Dr.Hammond on the email, who should then to the email saying "Approved"
*Only CC Dr.C if there is an issue with the process that Dr.Hammond cannot solve

== College of Computing ==

College of Computing Building
* Have CoC sponsor contact doorcontrol@cc.gatech.edu
* For RIM access (and building access) contact Nina White.
* [http://support.cc.gatech.edu/services/building-access CoC Building Access Information]

== School of Electrical and Computer Engineering ==

Van Leer
* Befriend an ECE student. All ECE students have access.
* Join the amateur radio club, W4AQL, and if you pay a $50 deposit, you get a physical key that will open the front doors of Van Leer and the shack on the 4th floor.

Klaus
*

[[Category: Core]]
[[Category: Shop]]
[[Category:How to Guides]]

Kickoff planning

2020-01-05T18:53:13Z

Jspall3: /* October */

[[Category:Outreach]][[Category:Kickoff Consolidation]]
== The President ==

=== August ===
* Verify IRIM and the CoC can support the event
* Contact Ferst Theater to reserve the theater venue
** Office of the Arts Event Coordinator
* Identify the RoboJackets Kickoff Coordinator
** Introduce to Ga FIRST Regional Director and Kickoff Coordinator
* Identify the RoboJackets A/V Lead
* Identify the RoboJackets Volunteer Coordinator

=== September ===
* Inform Youth Programs (YP) that an event of 1000+ minors will be held on campus
** [http://youthprograms.gatech.edu/youth-programs-registration Register the event with YP]
** Ensure the expected adult/child ratio is better than 1:10
* Request Proof of Liability Insurance from Ga FIRST
** This should be coordinated through YP, and delivered to Georgia Tech Insurance, Claims, and Property Control

=== October ===
* Reserve non-Ferst rooms
** Workshops
*** Klaus 1443, 1447, 1456, 2443, 2447, 2456, 1116E/W
**** Through IRIM Administrative Manager
** Student Center
*** Ballroom
*** Theater (not needed as of 2020)
*** Piedmont (not needed as of 2020)
* Schedule meetings or notify emergency services at Georgia Tech
** May be coordinated through YP
** Requires rooms to be booked first
** Notify Police Chief
** Notify Fire Marshall
* Coordinate with RJ PR Chair to design banners
** Paper and Clay has 36" vinyl stock

=== November ===
* Invite Speakers
** Dean of the CoE
** Director of IRIM
** CoC Assistant Dean for Outreach, Enrollment, and Community
** RoboJackets Advisor
** We want two speakers typically
* Finalize Breakfast Catering
** Talk with the Director of the Computing Community at the CoC
** Plan for 750-1000 with gluten-free options
** On campus venue, so requires on-campus catering
* Confirm with Youth Programs that requirements have been met
* Confirm with IRIM that the Ferst theater has been paid for
** Office of the Arts Event Coordinator will reach out early Nov. to get IRIM's payment information
** Give payment info the IRIM Administrative Manager
* Confirm with the IRIM Administrative Manager non-Ferst rooms have been invoiced and paid for
* Schedule Theater Walkthrough
** Office of the Arts Event Coordinator will reach out
** Request their technical assistant to attend
** The President, RJ Kickoff Coordinator, RJ A/V Lead, and RJ Outreach PM should be in attendance
* Schedule Meeting with Student Center Reservations and Events Coordinator
** Describe catering requirements (so they verify compliance)
** Describe room configurations
*** Ballroom with 35, 10 person, 72" tables
*** Theater in default config
*** Additional overflow rooms in theater configuration
*** Volunteer Kickoff room in roundtable configuration with projector
* Place banner order
** Paper and Clay
** Grommets to hang
** Rod holder for weighing
* Pickup banner order
* Verify volunteer count

=== December ===
* finalize volunteer logistics
* determine stage schedule
* create presentation materials
* deliver materials to A/V
* purchase 35 circular table covers for 72" tables

=== January ===
* week-of purchases
** handle volunteer lunch
*** pizza with noon scheduled delivery
*** 2L bottles of soda
** water bottles for speakers and lunches
* hold status meeting Friday night

== The Kickoff Coordinator ==

== A/V Lead ==

== Volunteer Coordinator ==

== Important Non-RJ People ==

=== College of Computing ===
* Director of Computing Community - Troy Peace
* Assistant Dean of Outreach - Cedric Stallworth
* Administrative Professional to Assitant Dean of Outreach - Alyshia Jackson
* Educational Outreach Manager - Jen Whitlow

=== Ferst Theater ===
* Office of the Arts event Coordinator - Rachel Haage
* Technical Lead - Paul

=== IRIM ===
* Executive Director - Seth Hutchinson
* Administrative Manager - Cynthia Jordan

=== Student Center ===
* Reservations and Event Coordinator - Jillian Cruser

=== Safety ===
* Youth Programs Compliance Specalist - Kelly Cross
* Fire Marshall - Larry Labbe
* Police Chief - Sgt. Archie Hill
* Director of Insurance, Claims, and Property Control - Tom Provancher
* Attorney - Shelley Hildebrand

=== Georgia FIRST ===
* Regional Director - Connie Haynes
* Kickoff Coordinator - Val
* Photographer/Media - Karen

=== Other ===
* Building Access
** Klaus
*** Stacey Greyson (OWA directory John Grayson)
*** Daron Foreman
** CoC
*** Keith Watson

== Rooms ==

Kickoff planning

2020-01-05T18:52:48Z

Jspall3: /* October */

[[Category:Outreach]][[Category:Kickoff Consolidation]]
== The President ==

=== August ===
* Verify IRIM and the CoC can support the event
* Contact Ferst Theater to reserve the theater venue
** Office of the Arts Event Coordinator
* Identify the RoboJackets Kickoff Coordinator
** Introduce to Ga FIRST Regional Director and Kickoff Coordinator
* Identify the RoboJackets A/V Lead
* Identify the RoboJackets Volunteer Coordinator

=== September ===
* Inform Youth Programs (YP) that an event of 1000+ minors will be held on campus
** [http://youthprograms.gatech.edu/youth-programs-registration Register the event with YP]
** Ensure the expected adult/child ratio is better than 1:10
* Request Proof of Liability Insurance from Ga FIRST
** This should be coordinated through YP, and delivered to Georgia Tech Insurance, Claims, and Property Control

=== October ===
* Reserve non-Ferst rooms
** Workshops
*** Klaus 1443, 1447, 1456, 2443, 2447, 2456, 1116E/W
**** Through IRIM Administrative Manager
** Student Center
*** Ballroom
*** Theater
*** Piedmont
* Schedule meetings or notify emergency services at Georgia Tech
** May be coordinated through YP
** Requires rooms to be booked first
** Notify Police Chief
** Notify Fire Marshall
* Coordinate with RJ PR Chair to design banners
** Paper and Clay has 36" vinyl stock

=== November ===
* Invite Speakers
** Dean of the CoE
** Director of IRIM
** CoC Assistant Dean for Outreach, Enrollment, and Community
** RoboJackets Advisor
** We want two speakers typically
* Finalize Breakfast Catering
** Talk with the Director of the Computing Community at the CoC
** Plan for 750-1000 with gluten-free options
** On campus venue, so requires on-campus catering
* Confirm with Youth Programs that requirements have been met
* Confirm with IRIM that the Ferst theater has been paid for
** Office of the Arts Event Coordinator will reach out early Nov. to get IRIM's payment information
** Give payment info the IRIM Administrative Manager
* Confirm with the IRIM Administrative Manager non-Ferst rooms have been invoiced and paid for
* Schedule Theater Walkthrough
** Office of the Arts Event Coordinator will reach out
** Request their technical assistant to attend
** The President, RJ Kickoff Coordinator, RJ A/V Lead, and RJ Outreach PM should be in attendance
* Schedule Meeting with Student Center Reservations and Events Coordinator
** Describe catering requirements (so they verify compliance)
** Describe room configurations
*** Ballroom with 35, 10 person, 72" tables
*** Theater in default config
*** Additional overflow rooms in theater configuration
*** Volunteer Kickoff room in roundtable configuration with projector
* Place banner order
** Paper and Clay
** Grommets to hang
** Rod holder for weighing
* Pickup banner order
* Verify volunteer count

=== December ===
* finalize volunteer logistics
* determine stage schedule
* create presentation materials
* deliver materials to A/V
* purchase 35 circular table covers for 72" tables

=== January ===
* week-of purchases
** handle volunteer lunch
*** pizza with noon scheduled delivery
*** 2L bottles of soda
** water bottles for speakers and lunches
* hold status meeting Friday night

== The Kickoff Coordinator ==

== A/V Lead ==

== Volunteer Coordinator ==

== Important Non-RJ People ==

=== College of Computing ===
* Director of Computing Community - Troy Peace
* Assistant Dean of Outreach - Cedric Stallworth
* Administrative Professional to Assitant Dean of Outreach - Alyshia Jackson
* Educational Outreach Manager - Jen Whitlow

=== Ferst Theater ===
* Office of the Arts event Coordinator - Rachel Haage
* Technical Lead - Paul

=== IRIM ===
* Executive Director - Seth Hutchinson
* Administrative Manager - Cynthia Jordan

=== Student Center ===
* Reservations and Event Coordinator - Jillian Cruser

=== Safety ===
* Youth Programs Compliance Specalist - Kelly Cross
* Fire Marshall - Larry Labbe
* Police Chief - Sgt. Archie Hill
* Director of Insurance, Claims, and Property Control - Tom Provancher
* Attorney - Shelley Hildebrand

=== Georgia FIRST ===
* Regional Director - Connie Haynes
* Kickoff Coordinator - Val
* Photographer/Media - Karen

=== Other ===
* Building Access
** Klaus
*** Stacey Greyson (OWA directory John Grayson)
*** Daron Foreman
** CoC
*** Keith Watson

== Rooms ==

Kickoff planning

2020-01-05T18:48:54Z

Jspall3: /* IRIM */

[[Category:Outreach]][[Category:Kickoff Consolidation]]
== The President ==

=== August ===
* Verify IRIM and the CoC can support the event
* Contact Ferst Theater to reserve the theater venue
** Office of the Arts Event Coordinator
* Identify the RoboJackets Kickoff Coordinator
** Introduce to Ga FIRST Regional Director and Kickoff Coordinator
* Identify the RoboJackets A/V Lead
* Identify the RoboJackets Volunteer Coordinator

=== September ===
* Inform Youth Programs (YP) that an event of 1000+ minors will be held on campus
** [http://youthprograms.gatech.edu/youth-programs-registration Register the event with YP]
** Ensure the expected adult/child ratio is better than 1:10
* Request Proof of Liability Insurance from Ga FIRST
** This should be coordinated through YP, and delivered to Georgia Tech Insurance, Claims, and Property Control

=== October ===
* Reserve non-Ferst rooms
** Workshops
*** Klaus 1116E/W
**** Through KACB Building Manager
*** Klaus 1443, 1447, 1456, 2443, 2447, 2456
**** Through IRIM Administrative Manager
** Student Center
*** Ballroom
*** Theater
*** Piedmont
* Schedule meetings or notify emergency services at Georgia Tech
** May be coordinated through YP
** Requires rooms to be booked first
** Notify Police Chief
** Notify Fire Marshall
* Coordinate with RJ PR Chair to design banners
** Paper and Clay has 36" vinyl stock

=== November ===
* Invite Speakers
** Dean of the CoE
** Director of IRIM
** CoC Assistant Dean for Outreach, Enrollment, and Community
** RoboJackets Advisor
** We want two speakers typically
* Finalize Breakfast Catering
** Talk with the Director of the Computing Community at the CoC
** Plan for 750-1000 with gluten-free options
** On campus venue, so requires on-campus catering
* Confirm with Youth Programs that requirements have been met
* Confirm with IRIM that the Ferst theater has been paid for
** Office of the Arts Event Coordinator will reach out early Nov. to get IRIM's payment information
** Give payment info the IRIM Administrative Manager
* Confirm with the IRIM Administrative Manager non-Ferst rooms have been invoiced and paid for
* Schedule Theater Walkthrough
** Office of the Arts Event Coordinator will reach out
** Request their technical assistant to attend
** The President, RJ Kickoff Coordinator, RJ A/V Lead, and RJ Outreach PM should be in attendance
* Schedule Meeting with Student Center Reservations and Events Coordinator
** Describe catering requirements (so they verify compliance)
** Describe room configurations
*** Ballroom with 35, 10 person, 72" tables
*** Theater in default config
*** Additional overflow rooms in theater configuration
*** Volunteer Kickoff room in roundtable configuration with projector
* Place banner order
** Paper and Clay
** Grommets to hang
** Rod holder for weighing
* Pickup banner order
* Verify volunteer count

=== December ===
* finalize volunteer logistics
* determine stage schedule
* create presentation materials
* deliver materials to A/V
* purchase 35 circular table covers for 72" tables

=== January ===
* week-of purchases
** handle volunteer lunch
*** pizza with noon scheduled delivery
*** 2L bottles of soda
** water bottles for speakers and lunches
* hold status meeting Friday night

== The Kickoff Coordinator ==

== A/V Lead ==

== Volunteer Coordinator ==

== Important Non-RJ People ==

=== College of Computing ===
* Director of Computing Community - Troy Peace
* Assistant Dean of Outreach - Cedric Stallworth
* Administrative Professional to Assitant Dean of Outreach - Alyshia Jackson
* Educational Outreach Manager - Jen Whitlow

=== Ferst Theater ===
* Office of the Arts event Coordinator - Rachel Haage
* Technical Lead - Paul

=== IRIM ===
* Executive Director - Seth Hutchinson
* Administrative Manager - Cynthia Jordan

=== Student Center ===
* Reservations and Event Coordinator - Jillian Cruser

=== Safety ===
* Youth Programs Compliance Specalist - Kelly Cross
* Fire Marshall - Larry Labbe
* Police Chief - Sgt. Archie Hill
* Director of Insurance, Claims, and Property Control - Tom Provancher
* Attorney - Shelley Hildebrand

=== Georgia FIRST ===
* Regional Director - Connie Haynes
* Kickoff Coordinator - Val
* Photographer/Media - Karen

=== Other ===
* Building Access
** Klaus
*** Stacey Greyson (OWA directory John Grayson)
*** Daron Foreman
** CoC
*** Keith Watson

== Rooms ==

Kickoff planning

2020-01-05T18:46:49Z

Jspall3: /* December */

[[Category:Outreach]][[Category:Kickoff Consolidation]]
== The President ==

=== August ===
* Verify IRIM and the CoC can support the event
* Contact Ferst Theater to reserve the theater venue
** Office of the Arts Event Coordinator
* Identify the RoboJackets Kickoff Coordinator
** Introduce to Ga FIRST Regional Director and Kickoff Coordinator
* Identify the RoboJackets A/V Lead
* Identify the RoboJackets Volunteer Coordinator

=== September ===
* Inform Youth Programs (YP) that an event of 1000+ minors will be held on campus
** [http://youthprograms.gatech.edu/youth-programs-registration Register the event with YP]
** Ensure the expected adult/child ratio is better than 1:10
* Request Proof of Liability Insurance from Ga FIRST
** This should be coordinated through YP, and delivered to Georgia Tech Insurance, Claims, and Property Control

=== October ===
* Reserve non-Ferst rooms
** Workshops
*** Klaus 1116E/W
**** Through KACB Building Manager
*** Klaus 1443, 1447, 1456, 2443, 2447, 2456
**** Through IRIM Administrative Manager
** Student Center
*** Ballroom
*** Theater
*** Piedmont
* Schedule meetings or notify emergency services at Georgia Tech
** May be coordinated through YP
** Requires rooms to be booked first
** Notify Police Chief
** Notify Fire Marshall
* Coordinate with RJ PR Chair to design banners
** Paper and Clay has 36" vinyl stock

=== November ===
* Invite Speakers
** Dean of the CoE
** Director of IRIM
** CoC Assistant Dean for Outreach, Enrollment, and Community
** RoboJackets Advisor
** We want two speakers typically
* Finalize Breakfast Catering
** Talk with the Director of the Computing Community at the CoC
** Plan for 750-1000 with gluten-free options
** On campus venue, so requires on-campus catering
* Confirm with Youth Programs that requirements have been met
* Confirm with IRIM that the Ferst theater has been paid for
** Office of the Arts Event Coordinator will reach out early Nov. to get IRIM's payment information
** Give payment info the IRIM Administrative Manager
* Confirm with the IRIM Administrative Manager non-Ferst rooms have been invoiced and paid for
* Schedule Theater Walkthrough
** Office of the Arts Event Coordinator will reach out
** Request their technical assistant to attend
** The President, RJ Kickoff Coordinator, RJ A/V Lead, and RJ Outreach PM should be in attendance
* Schedule Meeting with Student Center Reservations and Events Coordinator
** Describe catering requirements (so they verify compliance)
** Describe room configurations
*** Ballroom with 35, 10 person, 72" tables
*** Theater in default config
*** Additional overflow rooms in theater configuration
*** Volunteer Kickoff room in roundtable configuration with projector
* Place banner order
** Paper and Clay
** Grommets to hang
** Rod holder for weighing
* Pickup banner order
* Verify volunteer count

=== December ===
* finalize volunteer logistics
* determine stage schedule
* create presentation materials
* deliver materials to A/V
* purchase 35 circular table covers for 72" tables

=== January ===
* week-of purchases
** handle volunteer lunch
*** pizza with noon scheduled delivery
*** 2L bottles of soda
** water bottles for speakers and lunches
* hold status meeting Friday night

== The Kickoff Coordinator ==

== A/V Lead ==

== Volunteer Coordinator ==

== Important Non-RJ People ==

=== College of Computing ===
* Director of Computing Community - Troy Peace
* Assistant Dean of Outreach - Cedric Stallworth
* Administrative Professional to Assitant Dean of Outreach - Alyshia Jackson
* Educational Outreach Manager - Jen Whitlow

=== Ferst Theater ===
* Office of the Arts event Coordinator - Rachel Haage
* Technical Lead - Paul

=== IRIM ===
* Executive Director - Magnus Egerstedt
* Administrative Manager - Nina Climes

=== Student Center ===
* Reservations and Event Coordinator - Jillian Cruser

=== Safety ===
* Youth Programs Compliance Specalist - Kelly Cross
* Fire Marshall - Larry Labbe
* Police Chief - Sgt. Archie Hill
* Director of Insurance, Claims, and Property Control - Tom Provancher
* Attorney - Shelley Hildebrand

=== Georgia FIRST ===
* Regional Director - Connie Haynes
* Kickoff Coordinator - Val
* Photographer/Media - Karen

=== Other ===
* Building Access
** Klaus
*** Stacey Greyson (OWA directory John Grayson)
*** Daron Foreman
** CoC
*** Keith Watson

== Rooms ==

Kickoff planning

2020-01-05T18:45:09Z

Jspall3: /* January */

[[Category:Outreach]][[Category:Kickoff Consolidation]]
== The President ==

=== August ===
* Verify IRIM and the CoC can support the event
* Contact Ferst Theater to reserve the theater venue
** Office of the Arts Event Coordinator
* Identify the RoboJackets Kickoff Coordinator
** Introduce to Ga FIRST Regional Director and Kickoff Coordinator
* Identify the RoboJackets A/V Lead
* Identify the RoboJackets Volunteer Coordinator

=== September ===
* Inform Youth Programs (YP) that an event of 1000+ minors will be held on campus
** [http://youthprograms.gatech.edu/youth-programs-registration Register the event with YP]
** Ensure the expected adult/child ratio is better than 1:10
* Request Proof of Liability Insurance from Ga FIRST
** This should be coordinated through YP, and delivered to Georgia Tech Insurance, Claims, and Property Control

=== October ===
* Reserve non-Ferst rooms
** Workshops
*** Klaus 1116E/W
**** Through KACB Building Manager
*** Klaus 1443, 1447, 1456, 2443, 2447, 2456
**** Through IRIM Administrative Manager
** Student Center
*** Ballroom
*** Theater
*** Piedmont
* Schedule meetings or notify emergency services at Georgia Tech
** May be coordinated through YP
** Requires rooms to be booked first
** Notify Police Chief
** Notify Fire Marshall
* Coordinate with RJ PR Chair to design banners
** Paper and Clay has 36" vinyl stock

=== November ===
* Invite Speakers
** Dean of the CoE
** Director of IRIM
** CoC Assistant Dean for Outreach, Enrollment, and Community
** RoboJackets Advisor
** We want two speakers typically
* Finalize Breakfast Catering
** Talk with the Director of the Computing Community at the CoC
** Plan for 750-1000 with gluten-free options
** On campus venue, so requires on-campus catering
* Confirm with Youth Programs that requirements have been met
* Confirm with IRIM that the Ferst theater has been paid for
** Office of the Arts Event Coordinator will reach out early Nov. to get IRIM's payment information
** Give payment info the IRIM Administrative Manager
* Confirm with the IRIM Administrative Manager non-Ferst rooms have been invoiced and paid for
* Schedule Theater Walkthrough
** Office of the Arts Event Coordinator will reach out
** Request their technical assistant to attend
** The President, RJ Kickoff Coordinator, RJ A/V Lead, and RJ Outreach PM should be in attendance
* Schedule Meeting with Student Center Reservations and Events Coordinator
** Describe catering requirements (so they verify compliance)
** Describe room configurations
*** Ballroom with 35, 10 person, 72" tables
*** Theater in default config
*** Additional overflow rooms in theater configuration
*** Volunteer Kickoff room in roundtable configuration with projector
* Place banner order
** Paper and Clay
** Grommets to hang
** Rod holder for weighing
* Pickup banner order
* Verify volunteer count

=== December ===
* finalize volunteer logistics
* determine stage schedule
* create presentation materials
* deliver materials to A/V

=== January ===
* week-of purchases
** handle volunteer lunch
*** pizza with noon scheduled delivery
*** 2L bottles of soda
** water bottles for speakers and lunches
* hold status meeting Friday night

== The Kickoff Coordinator ==

== A/V Lead ==

== Volunteer Coordinator ==

== Important Non-RJ People ==

=== College of Computing ===
* Director of Computing Community - Troy Peace
* Assistant Dean of Outreach - Cedric Stallworth
* Administrative Professional to Assitant Dean of Outreach - Alyshia Jackson
* Educational Outreach Manager - Jen Whitlow

=== Ferst Theater ===
* Office of the Arts event Coordinator - Rachel Haage
* Technical Lead - Paul

=== IRIM ===
* Executive Director - Magnus Egerstedt
* Administrative Manager - Nina Climes

=== Student Center ===
* Reservations and Event Coordinator - Jillian Cruser

=== Safety ===
* Youth Programs Compliance Specalist - Kelly Cross
* Fire Marshall - Larry Labbe
* Police Chief - Sgt. Archie Hill
* Director of Insurance, Claims, and Property Control - Tom Provancher
* Attorney - Shelley Hildebrand

=== Georgia FIRST ===
* Regional Director - Connie Haynes
* Kickoff Coordinator - Val
* Photographer/Media - Karen

=== Other ===
* Building Access
** Klaus
*** Stacey Greyson (OWA directory John Grayson)
*** Daron Foreman
** CoC
*** Keith Watson

== Rooms ==

Kickoff planning

2020-01-05T18:44:27Z

Jspall3: /* January */

[[Category:Outreach]][[Category:Kickoff Consolidation]]
== The President ==

=== August ===
* Verify IRIM and the CoC can support the event
* Contact Ferst Theater to reserve the theater venue
** Office of the Arts Event Coordinator
* Identify the RoboJackets Kickoff Coordinator
** Introduce to Ga FIRST Regional Director and Kickoff Coordinator
* Identify the RoboJackets A/V Lead
* Identify the RoboJackets Volunteer Coordinator

=== September ===
* Inform Youth Programs (YP) that an event of 1000+ minors will be held on campus
** [http://youthprograms.gatech.edu/youth-programs-registration Register the event with YP]
** Ensure the expected adult/child ratio is better than 1:10
* Request Proof of Liability Insurance from Ga FIRST
** This should be coordinated through YP, and delivered to Georgia Tech Insurance, Claims, and Property Control

=== October ===
* Reserve non-Ferst rooms
** Workshops
*** Klaus 1116E/W
**** Through KACB Building Manager
*** Klaus 1443, 1447, 1456, 2443, 2447, 2456
**** Through IRIM Administrative Manager
** Student Center
*** Ballroom
*** Theater
*** Piedmont
* Schedule meetings or notify emergency services at Georgia Tech
** May be coordinated through YP
** Requires rooms to be booked first
** Notify Police Chief
** Notify Fire Marshall
* Coordinate with RJ PR Chair to design banners
** Paper and Clay has 36" vinyl stock

=== November ===
* Invite Speakers
** Dean of the CoE
** Director of IRIM
** CoC Assistant Dean for Outreach, Enrollment, and Community
** RoboJackets Advisor
** We want two speakers typically
* Finalize Breakfast Catering
** Talk with the Director of the Computing Community at the CoC
** Plan for 750-1000 with gluten-free options
** On campus venue, so requires on-campus catering
* Confirm with Youth Programs that requirements have been met
* Confirm with IRIM that the Ferst theater has been paid for
** Office of the Arts Event Coordinator will reach out early Nov. to get IRIM's payment information
** Give payment info the IRIM Administrative Manager
* Confirm with the IRIM Administrative Manager non-Ferst rooms have been invoiced and paid for
* Schedule Theater Walkthrough
** Office of the Arts Event Coordinator will reach out
** Request their technical assistant to attend
** The President, RJ Kickoff Coordinator, RJ A/V Lead, and RJ Outreach PM should be in attendance
* Schedule Meeting with Student Center Reservations and Events Coordinator
** Describe catering requirements (so they verify compliance)
** Describe room configurations
*** Ballroom with 35, 10 person, 72" tables
*** Theater in default config
*** Additional overflow rooms in theater configuration
*** Volunteer Kickoff room in roundtable configuration with projector
* Place banner order
** Paper and Clay
** Grommets to hang
** Rod holder for weighing
* Pickup banner order
* Verify volunteer count

=== December ===
* finalize volunteer logistics
* determine stage schedule
* create presentation materials
* deliver materials to A/V

=== January ===
* purchases
** handle volunteer lunch
*** pizza with noon scheduled delivery
*** 2L bottles of soda
** water bottles for speakers and lunches
* hold status meeting Friday night

== The Kickoff Coordinator ==

== A/V Lead ==

== Volunteer Coordinator ==

== Important Non-RJ People ==

=== College of Computing ===
* Director of Computing Community - Troy Peace
* Assistant Dean of Outreach - Cedric Stallworth
* Administrative Professional to Assitant Dean of Outreach - Alyshia Jackson
* Educational Outreach Manager - Jen Whitlow

=== Ferst Theater ===
* Office of the Arts event Coordinator - Rachel Haage
* Technical Lead - Paul

=== IRIM ===
* Executive Director - Magnus Egerstedt
* Administrative Manager - Nina Climes

=== Student Center ===
* Reservations and Event Coordinator - Jillian Cruser

=== Safety ===
* Youth Programs Compliance Specalist - Kelly Cross
* Fire Marshall - Larry Labbe
* Police Chief - Sgt. Archie Hill
* Director of Insurance, Claims, and Property Control - Tom Provancher
* Attorney - Shelley Hildebrand

=== Georgia FIRST ===
* Regional Director - Connie Haynes
* Kickoff Coordinator - Val
* Photographer/Media - Karen

=== Other ===
* Building Access
** Klaus
*** Stacey Greyson (OWA directory John Grayson)
*** Daron Foreman
** CoC
*** Keith Watson

== Rooms ==

Kickoff planning

2019-11-15T20:09:19Z

Jspall3: /* November */

[[Category:Outreach]][[Category:Kickoff Consolidation]]
== The President ==

=== August ===
* Verify IRIM and the CoC can support the event
* Contact Ferst Theater to reserve the theater venue
** Office of the Arts Event Coordinator
* Identify the RoboJackets Kickoff Coordinator
** Introduce to Ga FIRST Regional Director and Kickoff Coordinator
* Identify the RoboJackets A/V Lead
* Identify the RoboJackets Volunteer Coordinator

=== September ===
* Inform Youth Programs (YP) that an event of 1000+ minors will be held on campus
** [http://youthprograms.gatech.edu/youth-programs-registration Register the event with YP]
** Ensure the expected adult/child ratio is better than 1:10
* Request Proof of Liability Insurance from Ga FIRST
** This should be coordinated through YP, and delivered to Georgia Tech Insurance, Claims, and Property Control

=== October ===
* Reserve non-Ferst rooms
** Workshops
*** Klaus 1116E/W
**** Through KACB Building Manager
*** Klaus 1443, 1447, 1456, 2443, 2447, 2456
**** Through IRIM Administrative Manager
** Student Center
*** Ballroom
*** Theater
*** Piedmont
* Schedule meetings or notify emergency services at Georgia Tech
** May be coordinated through YP
** Requires rooms to be booked first
** Notify Police Chief
** Notify Fire Marshall
* Coordinate with RJ PR Chair to design banners
** Paper and Clay has 36" vinyl stock

=== November ===
* Invite Speakers
** Dean of the CoE
** Director of IRIM
** CoC Assistant Dean for Outreach, Enrollment, and Community
** RoboJackets Advisor
** We want two speakers typically
* Finalize Breakfast Catering
** Talk with the Director of the Computing Community at the CoC
** Plan for 750-1000 with gluten-free options
** On campus venue, so requires on-campus catering
* Confirm with Youth Programs that requirements have been met
* Confirm with IRIM that the Ferst theater has been paid for
** Office of the Arts Event Coordinator will reach out early Nov. to get IRIM's payment information
** Give payment info the IRIM Administrative Manager
* Confirm with the IRIM Administrative Manager non-Ferst rooms have been invoiced and paid for
* Schedule Theater Walkthrough
** Office of the Arts Event Coordinator will reach out
** Request their technical assistant to attend
** The President, RJ Kickoff Coordinator, RJ A/V Lead, and RJ Outreach PM should be in attendance
* Schedule Meeting with Student Center Reservations and Events Coordinator
** Describe catering requirements (so they verify compliance)
** Describe room configurations
*** Ballroom with 35, 10 person, 72" tables
*** Theater in default config
*** Additional overflow rooms in theater configuration
*** Volunteer Kickoff room in roundtable configuration with projector
* Place banner order
** Paper and Clay
** Grommets to hang
** Rod holder for weighing
* Pickup banner order
* Verify volunteer count

=== December ===
* finalize volunteer logistics
* determine stage schedule
* create presentation materials
* deliver materials to A/V

=== January ===
* handle volunteer lunch
* hold status meeting Friday night

== The Kickoff Coordinator ==

== A/V Lead ==

== Volunteer Coordinator ==

== Important Non-RJ People ==

=== College of Computing ===
* Director of Computing Community - Troy Peace
* Assistant Dean of Outreach - Cedric Stallworth
* Administrative Professional to Assitant Dean of Outreach - Alyshia Jackson
* Educational Outreach Manager - Jen Whitlow

=== Ferst Theater ===
* Office of the Arts event Coordinator - Rachel Haage
* Technical Lead - Paul

=== IRIM ===
* Executive Director - Magnus Egerstedt
* Administrative Manager - Nina Climes

=== Student Center ===
* Reservations and Event Coordinator - Jillian Cruser

=== Safety ===
* Youth Programs Compliance Specalist - Kelly Cross
* Fire Marshall - Larry Labbe
* Police Chief - Sgt. Archie Hill
* Director of Insurance, Claims, and Property Control - Tom Provancher
* Attorney - Shelley Hildebrand

=== Georgia FIRST ===
* Regional Director - Connie Haynes
* Kickoff Coordinator - Val
* Photographer/Media - Karen

=== Other ===
* Building Access
** Klaus
*** Stacey Greyson (OWA directory John Grayson)
*** Daron Foreman
** CoC
*** Keith Watson

== Rooms ==

People with Keys

2019-07-17T01:18:24Z

Jspall3:

'''These people have keys to the RoboJackets shop area. '''<br/>See [[Shop_Keys|Shop Keys]] for details on key assignments.

{| class="wikitable sortable"
|-
! Key Number
! Assigned To
|-
| 3SB6: 1
| Evan Peterson
|-
| 3SB6: 4
| Cameron Loyd
|-
| 3SB6: 5
| Jonathan Spalten
|-
| 3SB6: 7
| Unassigned
|-
| 3SB6: 8
| Marine Maisonneuve
|-
| 3SB6: 9
| Unassigned
|-
| 3SB6: 12
| Ava Thrasher
|-
| 3SB6: 14
| Collin Avidano
|-
| 3SB6: 15
| Dylan Fife
|-
| 3SB6: 18
| Unassigned
|-
| 3SB6: 19
| Will Stuckey
|-
| 3SB6: 20
| Oswin So
|-
| 3SB6: 21
| Juan Almagro
|-
| 3SB6: 22
| Alex Field
|-
| 3SB6: 23
| Brian Cochran
|-
| 3SB6: 24
| Unassigned
|-
| 3SB6: 27
| Manzano Akthar
|-
| 3SB6: 28
| Joseph Spall
|-
| 3SB6: 29
| [[User:Mbarulic|Matthew Barulic]]
|-
|3SB6: 30
| Daniel Martin
|-
| 3SB6: 31
| Juan Elizondo
|-
|3SB6: 33
| Unassigned
|-
|3SB6: 34
| Jason Gibson
|-
|3SB6: 35
| Cory Stine
|-
|3SB6: 36
| Varun Madabushi
|-
|3SB6: 38
| Austin Keener
|-
|3SB6: 39
| Unassigned
|-
|3SB6: 40
| Unassigned
|-
|3SB6: 41
| Asha Bhandarkar
|-
|3SB6: 43
| Young Won
|-
|3SB6: 44
| Matthew Woodward
|-
|3SB6: 45
| Evan Bretl
|}

[[Category:Core]]

Past Officers

2019-05-11T19:54:27Z

Jspall3: Added 2019-2020 individuals

[[Category:Leadership Positions]]

<h2> 1999-2000 </h2><dl><dt>President
</dt>
<dd>Brad Geving
</dd></dl><h2> 2000-2001 </h2><dl><dt>President 
</dt>
<dd>Austin Chen
</dd></dl><h2> 2001-2002 </h2><dl><dt>President 
</dt>
<dd>Austin Chen
</dd></dl><h2> 2002-2003 </h2><dl><dt>President 
</dt>
<dd>Austin Chen
</dd></dl><h2> 2003-2004 </h2><dl><dt>President 
</dt>
<dd>Brian Byrne
</dd></dl><h2> 2004-2005 </h2><dl><dt>President 
</dt>
<dd>Ben Johnson
</dd>
<dt>Vice-President 
</dt>
<dd>Jevawn Roberts
</dd>
<dt>Treasurer 
</dt>
<dd>Stephan Agripedes
</dd>
<dt>Secretary 
</dt>
<dd>Ryan Stewart
</dd>
<dt>Public Relations 
</dt>
<dd>Steven Dang
</dd></dl><h2> 2005-2006 </h2><dl><dt>President 
</dt>
<dd>Jevawn Roberts
</dd>
<dt>Vice-President 
</dt>
<dd>Steven Dang
</dd>
<dt>Treasurer 
</dt>
<dd>Logan Snow
</dd>
<dt>Secretary 
</dt>
<dd>Ryan Stewart
</dd>
<dt>Public Relations 
</dt>
<dd>Nobody
</dd></dl><h2> 2006-2007 </h2><dl><dt>President 
</dt>
<dd>Steven Dang
</dd>
<dt>Vice-President 
</dt>
<dd>Andrew Bardagjy
</dd>
<dt>Treasurer 
</dt>
<dd>Phillip Marks
</dd>
<dt>Secretary 
</dt>
<dd>Ryan Stewart
</dd>
<dt>Public Relations 
</dt>
<dd>Hung Nguyen
</dd></dl><h2> 2007-2008 </h2><dl><dt>President 
</dt>
<dd>Phillip Marks
</dd>
<dt>Vice-President 
</dt>
<dd>Brian Guerriero
</dd>
<dt>Treasurer 
</dt>
<dd>Roman Shtylman
</dd>
<dt>Secretary 
</dt>
<dd>Hung Nguyen
</dd>
<dt>Public Relations 
</dt>
<dd>Stefan Posey
</dd></dl><h2> 2008-2009 </h2><dl><dt>President 
</dt>
<dd>Phillip Marks
</dd>
<dt>Vice-President 
</dt>
<dd>Roman Shtylman
</dd>
<dt>Treasurer 
</dt>
<dd>Jake Nieman
</dd>
<dt>Secretary 
</dt>
<dd>Janki Patel
</dd>
<dt>Public Relations 
</dt>
<dd>Stefan Posey
</dd></dl><h2> 2009-2010 </h2><dl><dt>President 
</dt>
<dd>Stefan Posey
</dd>
<dt>Vice-President
</dt>
<dd>Paul Varnell
</dd>
<dt>Treasurer 
</dt>
<dd>Mick Roper
</dd>
<dt>Secretary 
</dt>
<dd>Dan Harden (1/2 year)
</dd>
<dt>Public Relations 
</dt>
<dd>Jannice Park
</dd></dl><h2> 2010-2011 </h2><dl><dt>President 
</dt>
<dd>Stefan Posey
</dd>
<dt>Vice-President 
</dt>
<dd>Stoian Borrisov
</dd>
<dt>Treasurer 
</dt>
<dd>Aakash Gihwala
</dd>
<dt>Secretary 
</dt>
<dd>Jannice Park
</dd>
<dt>Public Relations 
</dt>
<dd>John Madden
</dd>
<dt>Shop Manager 
</dt>
<dd>Joseph Hickey
</dd></dl><h2> 2011-2012 </h2><dl><dt>President 
</dt>
<dd>Joseph Hickey
</dd>
<dt>Vice-President 
</dt>
<dd>Jordan Mazaira
</dd>
<dt>Treasurer 
</dt>
<dd>Aakash Gihwala
</dd>
<dt>Secretary 
</dt>
<dd>Jannice Park
</dd>
<dt>Public Relations 
</dt>
<dd>Virgille Arquisola
</dd>
<dt>Shop Manager 
</dt>
<dd>Stefan Posey
</dd></dl><h2> 2012-2013 </h2><dl><dt>President 
</dt>
<dd>Jordan Mazaira
</dd>
<dt>Vice-President 
</dt>
<dd>Justin Buchanan (1/2 year)
</dd>
<dd>Max Carlson (1/2 year)
</dd>
<dt>Treasurer 
</dt>
<dd>Brandon Armstrong
</dd>
<dt>Secretary 
</dt>
<dd>Christopher Dohopolski
</dd>
<dt>Public Relations 
</dt>
<dd>Claire Bergman (1/2 year)
</dd>
<dd>Ahmed Mansour (1/2 year)
</dd>
<dt>Shop Manager 
</dt>
<dd>Emanuel Jones
</dd></dl><pre class="_fck_mw_lspace"><b>With the 2012 <a href=":File%3ARJConstitution.pdf">Constitution</a> update, Project Managers were included among the officers.</b>
</pre><dl><dt>BattleBots Project Manager 
</dt>
<dd>Kevin Umana
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Alex Eng
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Joseph Hickey
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Nikolaus Mitchell
</dd></dl><h2> 2013-2014 </h2><dl><dt>President 
</dt>
<dd>Nikolaus Mitchell (1/2 year)
</dd>
<dd>Brandon Armstrong (1/2 year)
</dd>
<dt>Vice-President 
</dt>
<dd>Brandon Armstrong (1/2 year)
</dd>
<dd>Sue Pedapudi (1/2 year)
</dd>
<dt>Treasurer 
</dt>
<dd>Alexander Trimm (1/2 year)
</dd>
<dd>George Vellarningattu (1/2 year)
</dd>
<dt>Secretary 
</dt>
<dd>Ahmed Mansour (1/2 year)
</dd>
<dd>Orlin Velev (1/2 year)
</dd>
<dt>Public Relations 
</dt>
<dd>Sue Pedapudi (1/2 year)
</dd>
<dd>Neeta Thawani (1/2 year)
</dd>
<dt>Shop Manager 
</dt>
<dd>Ryan Martin
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Max Carlson
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Ben Nuttle
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Matt Barulic
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Lindsey Langstaff
</dd>
<dt>IARRC Project Manager 
</dt>
<dd>Joseph Hickey
</dd></dl><h2> 2014-2015 </h2><dl><dt>President 
</dt>
<dd>Ben Nuttle
</dd>
<dt>Vice-President 
</dt>
<dd>Lindsey Langstaff (1/2 year)
</dd>
<dd>Himanshu Dedge (1/2 year)
</dd>
<dt>Treasurer 
</dt>
<dd>Matt Barulic
</dd>
<dt>Secretary 
</dt>
<dd>Cecilia Liu (1/2 year)
</dd>
<dd>Komal Hirani (1/2 year)
</dd>
<dt>Public Relations 
</dt>
<dd>Chelsea Silberglied
</dd>
<dt>Shop Manager 
</dt>
<dd>Cory Feig-Sandoval
</dd>
<dt>IT Coordinator
</dt>
<dd>Ryan Strat
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Ryan Martin
</dd>
<dd>Ethan Bisgaard
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Casey O'Connor
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Orlin Velev
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Justin Buchanan
</dd>
<dt>IARRC Project Manager 
</dt>
<dd>Alberto Sainz de la Pena
</dd></dl><h2> 2015-2016 </h2><dl><dt>President 
</dt>
<dd>Matt Barulic
</dd>
<dt>Vice-President 
</dt>
<dd>Orlin Velev (Fall)
</dd>
<dd>Sean Csukas (Spring)
</dd>
<dt>Treasurer 
</dt>
<dd>Ahmed Mansour (Fall)
</dd>
<dd>Eris He (Spring)
</dd>
<dt>Secretary 
</dt>
<dd>Kelvin Chong
</dd>
<dt>Public Relations 
</dt>
<dd>Carissa Fernandez
</dd>
<dt>Shop Manager 
</dt>
<dd>Daniel Choi
</dd>
<dt>IT Coordinator
</dt>
<dd>Jay Kamat
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Ryan Martin
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Casey O'Connor
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Alex Gurney
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Ryan Strat
</dd>
<dt>IARRC Project Manager 
</dt>
<dd>George Smirnov
</dd></dl><h2> 2016-2017 </h2><dl><dt>President 
</dt>
<dd>Ryan Strat
</dd>
<dt>Vice-President 
</dt>
<dd>Ryan Martin
</dd>
<dt>Treasurer 
</dt>
<dd>Orlin Velev (Fall)
</dd>
<dd>Sanjana Tewathia (Spring)
</dd>
<dt>Secretary 
</dt>
<dd>Daniil Budanov
</dd>
<dt>Public Relations 
</dt>
<dd>Carissa Fernandez
</dd>
<dt>Shop Manager 
</dt>
<dd>Boris Iachonkov
</dd>
<dt>IT Coordinator
</dt>
<dd>Kristaps Berzinch
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Daniel Choi
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Sarah Storer
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Noah Daugherty
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Will Stuckey
</dd>
<dt>IARRC Project Manager 
</dt>
<dd>Ransomed Adebayo

</dd></dl><h2> 2017-2018 </h2><dl><dt>President 
</dt>
<dd>Will Stuckey
</dd>
<dt>Vice-President 
</dt>
<dd>Daniil Budanov (Fall)</dd>
<dd>Jonathan Spalten (Spring)</dd>
<dt>Treasurer 
</dt>
<dd>Kristaps Berzinch

</dd>
<dt>Secretary 
</dt>
<dd>Carrie Wehmeyer</dd>
<dt>Public Relations 
</dt>
<dd>Tristan Gaskins</dd>
<dt>Shop Manager 
</dt>
<dd>Dustin Sloan
</dd>
<dt>IT Coordinator
</dt>
<dd>John Carnahan
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Daniel Choi
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Micheal Benben
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Justin Zheng (Fall)
</dd>
<dd>Dallas Downing (Spring)
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Jeremy Feltracco</dd>
<dt>IARRC Project Manager 
</dt>
<dd>Evan Bretl
</dd>
</dl>

<h2> 2018-2019 </h2><dl><dt>President 
</dt>
<dd>Jason Gibson
</dd>
<dt>Vice-President 
</dt>
<dd>Jonathan Spalten</dd>
<dt>Treasurer 
</dt>
<dd>Carrie Wehmeyer
</dd>
<dt>Secretary 
</dt>
<dd>Josh Oldenburg</dd>
<dt>Public Relations 
</dt>
<dd>Kyla Qi</dd>
<dt>Shop Manager 
</dt>
<dd>Tomas Osses
</dd>
<dt>IT Coordinator
</dt>
<dd>Evan Strat
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Nico Castro
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>James O'Connor
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Dallas Downing
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Matthew Woodward</dd>
<dt>IARRC Project Manager 
</dt>
<dd>Varun Madabushi
</dd></dl>

<h2> 2019-2020 </h2>
<dl><dt>President </dt>
<dd>Joe Spall</dd>
<dt>Vice-President </dt>
<dd>James Reed</dd>
<dt>Treasurer </dt>
<dd>Josh Oldenburg</dd>
<dt>Secretary </dt>
<dd>Ava Thrasher</dd>
<dt>Public Relations </dt>
<dd>Vijay Srivastava</dd>
<dt>Shop Manager </dt>
<dd>Dylan Steel Fife</dd>
<dt>IT Coordinator </dt>
<dd>Collin Avidano</dd>
<dt>BattleBots Project Manager </dt>
<dd>Alex Field</dd>
<dt>Outreach Project Manager </dt>
<dd>Kyla Qi</dd>
<dt>IGVC Project Manager </dt>
<dd>Cameron Loyd</dd>
<dt>RoboCup Project Manager </dt>
<dd>Juan Almagro</dd>
<dt>RoboRacing Project Manager </dt>
<dd>Austin Keener</dd>
</dl>

Past Officers

2019-05-11T19:48:01Z

Jspall3: Updated IGVC leadership for 2017-2018

[[Category:Leadership Positions]]

<h2> 1999-2000 </h2><dl><dt>President
</dt>
<dd>Brad Geving
</dd></dl><h2> 2000-2001 </h2><dl><dt>President 
</dt>
<dd>Austin Chen
</dd></dl><h2> 2001-2002 </h2><dl><dt>President 
</dt>
<dd>Austin Chen
</dd></dl><h2> 2002-2003 </h2><dl><dt>President 
</dt>
<dd>Austin Chen
</dd></dl><h2> 2003-2004 </h2><dl><dt>President 
</dt>
<dd>Brian Byrne
</dd></dl><h2> 2004-2005 </h2><dl><dt>President 
</dt>
<dd>Ben Johnson
</dd>
<dt>Vice-President 
</dt>
<dd>Jevawn Roberts
</dd>
<dt>Treasurer 
</dt>
<dd>Stephan Agripedes
</dd>
<dt>Secretary 
</dt>
<dd>Ryan Stewart
</dd>
<dt>Public Relations 
</dt>
<dd>Steven Dang
</dd></dl><h2> 2005-2006 </h2><dl><dt>President 
</dt>
<dd>Jevawn Roberts
</dd>
<dt>Vice-President 
</dt>
<dd>Steven Dang
</dd>
<dt>Treasurer 
</dt>
<dd>Logan Snow
</dd>
<dt>Secretary 
</dt>
<dd>Ryan Stewart
</dd>
<dt>Public Relations 
</dt>
<dd>Nobody
</dd></dl><h2> 2006-2007 </h2><dl><dt>President 
</dt>
<dd>Steven Dang
</dd>
<dt>Vice-President 
</dt>
<dd>Andrew Bardagjy
</dd>
<dt>Treasurer 
</dt>
<dd>Phillip Marks
</dd>
<dt>Secretary 
</dt>
<dd>Ryan Stewart
</dd>
<dt>Public Relations 
</dt>
<dd>Hung Nguyen
</dd></dl><h2> 2007-2008 </h2><dl><dt>President 
</dt>
<dd>Phillip Marks
</dd>
<dt>Vice-President 
</dt>
<dd>Brian Guerriero
</dd>
<dt>Treasurer 
</dt>
<dd>Roman Shtylman
</dd>
<dt>Secretary 
</dt>
<dd>Hung Nguyen
</dd>
<dt>Public Relations 
</dt>
<dd>Stefan Posey
</dd></dl><h2> 2008-2009 </h2><dl><dt>President 
</dt>
<dd>Phillip Marks
</dd>
<dt>Vice-President 
</dt>
<dd>Roman Shtylman
</dd>
<dt>Treasurer 
</dt>
<dd>Jake Nieman
</dd>
<dt>Secretary 
</dt>
<dd>Janki Patel
</dd>
<dt>Public Relations 
</dt>
<dd>Stefan Posey
</dd></dl><h2> 2009-2010 </h2><dl><dt>President 
</dt>
<dd>Stefan Posey
</dd>
<dt>Vice-President
</dt>
<dd>Paul Varnell
</dd>
<dt>Treasurer 
</dt>
<dd>Mick Roper
</dd>
<dt>Secretary 
</dt>
<dd>Dan Harden (1/2 year)
</dd>
<dt>Public Relations 
</dt>
<dd>Jannice Park
</dd></dl><h2> 2010-2011 </h2><dl><dt>President 
</dt>
<dd>Stefan Posey
</dd>
<dt>Vice-President 
</dt>
<dd>Stoian Borrisov
</dd>
<dt>Treasurer 
</dt>
<dd>Aakash Gihwala
</dd>
<dt>Secretary 
</dt>
<dd>Jannice Park
</dd>
<dt>Public Relations 
</dt>
<dd>John Madden
</dd>
<dt>Shop Manager 
</dt>
<dd>Joseph Hickey
</dd></dl><h2> 2011-2012 </h2><dl><dt>President 
</dt>
<dd>Joseph Hickey
</dd>
<dt>Vice-President 
</dt>
<dd>Jordan Mazaira
</dd>
<dt>Treasurer 
</dt>
<dd>Aakash Gihwala
</dd>
<dt>Secretary 
</dt>
<dd>Jannice Park
</dd>
<dt>Public Relations 
</dt>
<dd>Virgille Arquisola
</dd>
<dt>Shop Manager 
</dt>
<dd>Stefan Posey
</dd></dl><h2> 2012-2013 </h2><dl><dt>President 
</dt>
<dd>Jordan Mazaira
</dd>
<dt>Vice-President 
</dt>
<dd>Justin Buchanan (1/2 year)
</dd>
<dd>Max Carlson (1/2 year)
</dd>
<dt>Treasurer 
</dt>
<dd>Brandon Armstrong
</dd>
<dt>Secretary 
</dt>
<dd>Christopher Dohopolski
</dd>
<dt>Public Relations 
</dt>
<dd>Claire Bergman (1/2 year)
</dd>
<dd>Ahmed Mansour (1/2 year)
</dd>
<dt>Shop Manager 
</dt>
<dd>Emanuel Jones
</dd></dl><pre class="_fck_mw_lspace"><b>With the 2012 <a href=":File%3ARJConstitution.pdf">Constitution</a> update, Project Managers were included among the officers.</b>
</pre><dl><dt>BattleBots Project Manager 
</dt>
<dd>Kevin Umana
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Alex Eng
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Joseph Hickey
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Nikolaus Mitchell
</dd></dl><h2> 2013-2014 </h2><dl><dt>President 
</dt>
<dd>Nikolaus Mitchell (1/2 year)
</dd>
<dd>Brandon Armstrong (1/2 year)
</dd>
<dt>Vice-President 
</dt>
<dd>Brandon Armstrong (1/2 year)
</dd>
<dd>Sue Pedapudi (1/2 year)
</dd>
<dt>Treasurer 
</dt>
<dd>Alexander Trimm (1/2 year)
</dd>
<dd>George Vellarningattu (1/2 year)
</dd>
<dt>Secretary 
</dt>
<dd>Ahmed Mansour (1/2 year)
</dd>
<dd>Orlin Velev (1/2 year)
</dd>
<dt>Public Relations 
</dt>
<dd>Sue Pedapudi (1/2 year)
</dd>
<dd>Neeta Thawani (1/2 year)
</dd>
<dt>Shop Manager 
</dt>
<dd>Ryan Martin
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Max Carlson
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Ben Nuttle
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Matt Barulic
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Lindsey Langstaff
</dd>
<dt>IARRC Project Manager 
</dt>
<dd>Joseph Hickey
</dd></dl><h2> 2014-2015 </h2><dl><dt>President 
</dt>
<dd>Ben Nuttle
</dd>
<dt>Vice-President 
</dt>
<dd>Lindsey Langstaff (1/2 year)
</dd>
<dd>Himanshu Dedge (1/2 year)
</dd>
<dt>Treasurer 
</dt>
<dd>Matt Barulic
</dd>
<dt>Secretary 
</dt>
<dd>Cecilia Liu (1/2 year)
</dd>
<dd>Komal Hirani (1/2 year)
</dd>
<dt>Public Relations 
</dt>
<dd>Chelsea Silberglied
</dd>
<dt>Shop Manager 
</dt>
<dd>Cory Feig-Sandoval
</dd>
<dt>IT Coordinator
</dt>
<dd>Ryan Strat
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Ryan Martin
</dd>
<dd>Ethan Bisgaard
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Casey O'Connor
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Orlin Velev
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Justin Buchanan
</dd>
<dt>IARRC Project Manager 
</dt>
<dd>Alberto Sainz de la Pena
</dd></dl><h2> 2015-2016 </h2><dl><dt>President 
</dt>
<dd>Matt Barulic
</dd>
<dt>Vice-President 
</dt>
<dd>Orlin Velev (Fall)
</dd>
<dd>Sean Csukas (Spring)
</dd>
<dt>Treasurer 
</dt>
<dd>Ahmed Mansour (Fall)
</dd>
<dd>Eris He (Spring)
</dd>
<dt>Secretary 
</dt>
<dd>Kelvin Chong
</dd>
<dt>Public Relations 
</dt>
<dd>Carissa Fernandez
</dd>
<dt>Shop Manager 
</dt>
<dd>Daniel Choi
</dd>
<dt>IT Coordinator
</dt>
<dd>Jay Kamat
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Ryan Martin
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Casey O'Connor
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Alex Gurney
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Ryan Strat
</dd>
<dt>IARRC Project Manager 
</dt>
<dd>George Smirnov
</dd></dl><h2> 2016-2017 </h2><dl><dt>President 
</dt>
<dd>Ryan Strat
</dd>
<dt>Vice-President 
</dt>
<dd>Ryan Martin
</dd>
<dt>Treasurer 
</dt>
<dd>Orlin Velev (Fall)
</dd>
<dd>Sanjana Tewathia (Spring)
</dd>
<dt>Secretary 
</dt>
<dd>Daniil Budanov
</dd>
<dt>Public Relations 
</dt>
<dd>Carissa Fernandez
</dd>
<dt>Shop Manager 
</dt>
<dd>Boris Iachonkov
</dd>
<dt>IT Coordinator
</dt>
<dd>Kristaps Berzinch
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Daniel Choi
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Sarah Storer
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Noah Daugherty
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Will Stuckey
</dd>
<dt>IARRC Project Manager 
</dt>
<dd>Ransomed Adebayo

</dd></dl><h2> 2017-2018 </h2><dl><dt>President 
</dt>
<dd>Will Stuckey
</dd>
<dt>Vice-President 
</dt>
<dd>Daniil Budanov (Fall)</dd>
<dd>Jonathan Spalten (Spring)</dd>
<dt>Treasurer 
</dt>
<dd>Kristaps Berzinch

</dd>
<dt>Secretary 
</dt>
<dd>Carrie Wehmeyer</dd>
<dt>Public Relations 
</dt>
<dd>Tristan Gaskins</dd>
<dt>Shop Manager 
</dt>
<dd>Dustin Sloan
</dd>
<dt>IT Coordinator
</dt>
<dd>John Carnahan
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Daniel Choi
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>Micheal Benben
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Justin Zheng (Fall)
</dd>
<dd>Dallas Downing (Spring)
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Jeremy Feltracco</dd>
<dt>IARRC Project Manager 
</dt>
<dd>Evan Bretl
</dd>
</dl>

<h2> 2018-2019 </h2><dl><dt>President 
</dt>
<dd>Jason Gibson
</dd>
<dt>Vice-President 
</dt>
<dd>Jonathan Spalten</dd>
<dt>Treasurer 
</dt>
<dd>Carrie Wehmeyer

</dd>
<dt>Secretary 
</dt>
<dd>Josh Oldenburg</dd>
<dt>Public Relations 
</dt>
<dd>Kyla Qi</dd>
<dt>Shop Manager 
</dt>
<dd>Tomas Osses
</dd>
<dt>IT Coordinator
</dt>
<dd>Evan Strat
</dd>
<dt>BattleBots Project Manager 
</dt>
<dd>Nico Castro
</dd>
<dt>Outreach Project Manager 
</dt>
<dd>James O'Connor
</dd>
<dt>IGVC Project Manager 
</dt>
<dd>Dallas Downing
</dd>
<dt>RoboCup Project Manager 
</dt>
<dd>Matthew Woodward</dd>
<dt>IARRC Project Manager 
</dt>
<dd>Varun Madabushi
</dd></dl>

Elections Procedure

2019-04-25T22:32:06Z

Jspall3: /* Appointed Positions */

Each year elections are held for officers. This takes place in late spring over the span of two meetings, the first of which for nominations and the second for elections. Terms for elected positions last for one year with a transition period near the end of Spring Semester.

== Nominations ==

To be eligible for a position a person must be an active member of the RoboJackets who has paid dues. They must be nominated and seconded, and then must accept their nomination. The position of President, Vice President, and Treasurer may only be held by a person with at least one year of membership. Note it is not advisable for an officer to also be a project manager.

== Elections ==

The elections meeting will be conducted by the standing president. Elections will progress by electing positions from the President downward. Each candidate will be given time to speak without the other candidates in the room. Each speech will be follow by a period of questioning. After all candidates have had speeches and questioning, there will be discussion amongst all non-candidates until there is no more discussion or a motion to vote is verbally put forth. Voting will take place informally by a show of hands. If any member objects to informal voting, voting will then take place by ballot. A candidate will win by simple majority. Only dues-paying members will be permitted to vote or speak during the elections meeting; however, anyone may attend.

== Officers ==

The following positions are elected or appointed each year. Below, the roles of each position are summarized. For more information, see each role's page.

=== [[President]] ===

The President will have general supervision of the affairs of RoboJackets and its involvement with organizations on and off campus. Within RoboJackets, the President will be responsible for overseeing club finances with the Treasurer, leading bi-weekly core meetings, and being the general leader of the organization. Outside of RoboJackets, the President will act as a liaison between campus and external organizations, be a main point of contact for alumni and companies, represent RoboJackets in SCC Governing Board and CoC Undergraduate Council, and work with other SCC teams on relevant issues.

=== [[Vice-President]] ===

The Vice President will be the junior executive officer and will act on the behalf of the President in the event of his/her absence. The Vice President will work with project managers to ensure projects are executed as planned, and assist in presidential duties. The Vice President will also work with the PR chair to plan outreach events.

=== [[Treasurer]] ===

The Treasurer will be responsible for purchases and keeping accurate records of the ingoing and outgoing expenses from the organization’s accounts. Specifically, approving team budgets with the Project Managers and assisting them with purchase planning and coordinating trip expenses, attending all SGA finance hearings and overseeing RoboJackets' SGA bills and budgets, and providing financial guidance with sponsors.

=== [[Secretary]] ===

The Secretary is responsible for the reservations of rooms and vehicles for RoboJackets, reporting attendance information to the College of Computing, and organizing general meetings every month, and any social events. The Secretary will also take minutes at core meetings, organize social events with the PR Chair, and keep the wiki up to date.

=== [[Shop Manager]] ===

The Shop Manager will be responsible for ensuring cleanliness and organization within the shop and will submit requests for shop consumables and capital expenditures to the Treasurer as necessary. The Shop Manager will also assist with member training and work with other SCC teams on CMA matters.

=== [[Promotions Chair]] ===

The Promotions Chair will be responsible for the promotion of RoboJackets in the Georgia Tech community and beyond. The PR Chair will keep current promotional materials current and stocked, post to social media and the website about events and general updates, plan and organize social events with the Secretary. The PR Chair will also be responsible for branding through clothing, business cards, etc.

== [[Project Manager]] ==

Project Managers' primary responsibilities are to lead and assist their respective teams in getting the team's robot(s) to competition. Project Managers will plan team meetings and arrange transportation, prepare a budget and proposal for their team, build purchase orders for the their team, record their team's progress and report it at core meetings, manage their Sub-team Leads, work with the PR Chair to ensure photos and videos are produced at competitions, and maintain relevant team activities on the RoboJackets Calendar.

== [[Team Leadership]] ==

Team leadership varies between the different teams. More information can be found at the linked wiki article.

[[Leadership Changes Spring 2019]]

== Appointed Positions ==

=== [[IT_Coordinator|IT Coordinator]] ===

The IT Coordinator is responsible for managing and maintaining all non-robot technology. The IT Coordinator will submit a proposal and budget document every fall, just like project managers. This document will outline the key goals of RJ IT for the year and outline any costs.

=== [[Training Coordinator]] ===

The Training Chair is responsible for the training of new members in RoboJackets. The Training Chair will prepare purchase orders for training consumables, prepare and send communications regarding training sessions and work with training leads to build and carry out curriculums for new member training.

=== [[Electrical/Mechanical/Software Training Lead]] ===

Training Leads are responsible for developing their discipline's curriculum with the Training Chair and assisting the Training Chair with tasks within their discipline's training program.

=== [[Electrical/Mechanical/Software Discipline Core Chair]] ===

Discipline Core Chairs are responsible for scheduling and running the discipline core meeting. The chair should generate the agenda for the meeting and facilitate import discipline discussions as needed.

=== [[Kickoff Coordinator]] ===

The Kickoff coordinator will work with the President, Treasurer, Georgia FIRST, and relevant on-campus departments to plan Kickoff.

=== [[Volunteer Coordinator]] ===

The Volunteer Coordinator will work with parties requesting RoboJackets involvement to provide volunteers, organizing rides, volunteers, roles, and hotels during FRC/FTC season, organizing volunteers and logistics for FASET and other on-campus tabling, and working with various departments to provide outreach services for Georgia Tech through RoboJackets volunteering.

=== [[SCCGB Delegate (x2)]] ===

SCCGB Delegates will act as a liaison for the SCC and RoboJackets through attending bi-weekly SCCGB meetings.

=== [[Web App Product Owner]] ===

Project manager for the web applications actively being developed by RoboJackets.

[[Category:Core]][[Category:Policies]]

Elections Procedure

2019-04-03T00:04:22Z

Jspall3: Added Discipline Core Chair position

Each year elections are held for officers. This takes place in late spring over the span of two meetings, the first of which for nominations and the second for elections. Terms for elected positions last for one year with a transition period near the end of Spring Semester.

== Nominations ==

To be eligible for a position a person must be an active member of the RoboJackets who has paid dues. They must be nominated and seconded, and then must accept their nomination. The position of President, Vice President, and Treasurer may only be held by a person with at least one year of membership. Note it is not advisable for an officer to also be a project manager.

== Elections ==

The elections meeting will be conducted by the standing president. Elections will progress by electing positions from the President downward. Each candidate will be given time to speak without the other candidates in the room. Each speech will be follow by a period of questioning. After all candidates have had speeches and questioning, there will be discussion amongst all non-candidates until there is no more discussion or a motion to vote is verbally put forth. Voting will take place informally by a show of hands. If any member objects to informal voting, voting will then take place by ballot. A candidate will win by simple majority. Only dues-paying members will be permitted to vote or speak during the elections meeting; however, anyone may attend.

== Officers ==

The following positions are elected or appointed each year. Below, the roles of each position are summarized. For more information, see each role's page.

=== [[President]] ===

The President will have general supervision of the affairs of RoboJackets and its involvement with organizations on and off campus. Within RoboJackets, the President will be responsible for overseeing club finances with the Treasurer, leading bi-weekly core meetings, and being the general leader of the organization. Outside of RoboJackets, the President will act as a liaison between campus and external organizations, be a main point of contact for alumni and companies, represent RoboJackets in SCC Governing Board and CoC Undergraduate Council, and work with other SCC teams on relevant issues.

=== [[Vice-President]] ===

The Vice President will be the junior executive officer and will act on the behalf of the President in the event of his/her absence. The Vice President will work with project managers to ensure projects are executed as planned, and assist in presidential duties. The Vice President will also work with the PR chair to plan outreach events.

=== [[Treasurer]] ===

The Treasurer will be responsible for purchases and keeping accurate records of the ingoing and outgoing expenses from the organization’s accounts. Specifically, approving team budgets with the Project Managers and assisting them with purchase planning and coordinating trip expenses, attending all SGA finance hearings and overseeing RoboJackets' SGA bills and budgets, and providing financial guidance with sponsors.

=== [[Secretary]] ===

The Secretary is responsible for the reservations of rooms and vehicles for RoboJackets, reporting attendance information to the College of Computing, and organizing general meetings every month, and any social events. The Secretary will also take minutes at core meetings, organize social events with the PR Chair, and keep the wiki up to date.

=== [[Shop Manager]] ===

The Shop Manager will be responsible for ensuring cleanliness and organization within the shop and will submit requests for shop consumables and capital expenditures to the Treasurer as necessary. The Shop Manager will also assist with member training and work with other SCC teams on CMA matters.

=== [[Promotions Chair]] ===

The Promotions Chair will be responsible for the promotion of RoboJackets in the Georgia Tech community and beyond. The PR Chair will keep current promotional materials current and stocked, post to social media and the website about events and general updates, plan and organize social events with the Secretary. The PR Chair will also be responsible for branding through clothing, business cards, etc.

== [[Project Manager]] ==

Project Managers' primary responsibilities are to lead and assist their respective teams in getting the team's robot(s) to competition. Project Managers will plan team meetings and arrange transportation, prepare a budget and proposal for their team, build purchase orders for the their team, record their team's progress and report it at core meetings, manage their Sub-team Leads, work with the PR Chair to ensure photos and videos are produced at competitions, and maintain relevant team activities on the RoboJackets Calendar.

== Appointed Positions ==

=== [[IT_Coordinator|IT Coordinator]] ===

The IT Coordinator is responsible for managing and maintaining all non-robot technology. The IT Coordinator will submit a proposal and budget document every fall, just like project managers. This document will outline the key goals of RJ IT for the year and outline any costs.

=== [[Training Coordinator]] ===

The Training Chair is responsible for the training of new members in RoboJackets. The Training Chair will prepare purchase orders for training consumables, prepare and send communications regarding training sessions and work with training leads to build and carry out curriculums for new member training.

=== [[Electrical/Mechanical/Software Training Lead]] ===

Training Leads are responsible for developing their discipline's curriculum with the Training Chair and assisting the Training Chair with tasks within their discipline's training program.

=== [[Electrical/Mechanical/Software Discipline Core Chair]] ===

Discipline Core Chairs are responsible for scheduling and running the discipline core meeting. The chair should generate the agenda for the meeting and facilitate import discipline discussions as needed.

=== [[Kickoff Coordinator]] ===

The Kickoff coordinator will work with the President, Treasurer, Georgia FIRST, and relevant on-campus departments to plan Kickoff.

=== [[Volunteer Coordinator]] ===

The Volunteer Coordinator will work with parties requesting RoboJackets involvement to provide volunteers, organizing rides, volunteers, roles, and hotels during FRC/FTC season, organizing volunteers and logistics for FASET and other on-campus tabling, and working with various departments to provide outreach services for Georgia Tech through RoboJackets volunteering.

=== [[SCCGB Delegate (x2)]] ===

SCCGB Delegates will act as a liaison for the SCC and RoboJackets through attending bi-weekly SCCGB meetings.

[[Category:Core]][[Category:Policies]]

People with Keys

2017-10-31T19:39:13Z

Jspall3: Added Joseph Spall to key holder

'''These people have keys to the RoboJackets shop area. '''<br/>See [[Shop_Keys|Shop Keys]] for details on key assignments.

{| class="wikitable sortable"
|-
! Key Number
! Assigned To
|-
| 3SB6: 1
|Daniel Choi
|-
| 3SB6: 4
| Kristaps Berzinch
|-
| 3SB6: 5
|Tomas Osses
|-
| 3SB6: 7
| Luke Pasquarelli
|-
| 3SB6: 8
| Evan Bretl
|-
| 3SB6: 9
| Ryan Waldheim
|-
| 3SB6:12
| John Carnahan
|-
| 3SB6:14
| [[User:Snaeem|Sameer Naeem]]
|-
| 3SB6:15
|Evan Peterson
|-
| 3SB6:18
| Joshua Viszlai
|-
| 3SB6:19
|Will Stuckey
|-
| 3SB6:20
| Michael Benben
|-
| 3SB6:21
| Jeremy Feltracco
|-
| 3SB6:22
|Justin Zheng
|-
| 3SB6:23
| Carrie Li
|-
| 3SB6:24
| Dustin Sloan
|-
| 3SB6:28
| Joseph Spall
|-
| 3SB6:29
| [[User:Mbarulic|Matthew Barulic]]
|-
|3SB6:30
|Ruoyang Xu
|-
| 3SB6:31
|Daniil Budanov
|-
|3SB6:36
|Jonathan Spalten
|}