RC082ndBoardErrata

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Errata on rev 2 board marked May 15 2008 AB.

Errata

  • Swap pin 81 (M4HALL_A) and pin 78 (M4B_H) on FPGA. M4B_H is an input pin only, and should be an IO pin (because it is a motor out pin).
    • DONE
  • Connect DBST to 3V3 (the boost net on the 3V3 switcher)
    • DONE
  • PROGB on FPGA should be connected to 2V5 through a 4.7K resistor (R7) and to ground with a 10uF cap. This is to slow the booting of the FPGA (see the docs)
    • DONE
  • 100K pullup to 3V3 for R90 (DNE net for the kicker)
    • Set pullup on FPGA pin - need to check kicker board for trouble with DONE LED
  • Problem with impedances on the JTAG CLK line. A 15pF cap was added between clk and ground to smooth out the clk wave (ouch I know). As a further note, the FPGA has 2V5 JTAG logic and the ARM has 3V3 JTAG logic, this caused intermittent problems on the first rev, and this problem on the second rev.
    • Pending new CPU
  • Series resistors on FETs too big - maybe should be 10 ohms?
    • DONE
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